HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 500

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M = (0.5 –
The receive margin in asynchronous mode can therefore be expressed as in equation (1).
M: Receive margin (%)
N: Ratio of clock frequency to bit rate (N = 16)
D: Clock duty cycle (D = 0 to 1.0)
L: Frame length (L = 9 to 12)
F: Absolute deviation of clock frequency
From equation (1), if F = 0 and D = 0.5 the receive margin is 46.875%, as given by equation (2).
D = 0.5, F = 0
This is a theoretical value. A reasonable margin to allow in system designs is 20% to 30%.
M = | (0.5 –
= 46.875%.................................................................................................(2)
Internal
base clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
2 16
Figure 13-21 Receive Data Sampling Timing in Asynchronous Mode
1
2N
1
) – (L – 0.5) F –
)
0
8 clocks
Start bit
16 clocks
| D – 0.5 |
7
N
(1 + F) |
480
15 0
100%
...................(1)
D
0
7
15 0
D
1