HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 8
HD6413003TF16V
Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13003TF16V.pdf
(717 pages)
Specifications of HD6413003TF16V
Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6413003TF16V
Manufacturer:
ITT
Quantity:
12 000
Company:
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
36
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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2.9
Section 3
3.1
3.2
3.3
3.4
3.5
3.6
Section 4
4.1
4.2
4.3
4.4
4.5
4.6
Section 5
5.1
Basic Operational Timing............................................................................................... 53
2.9.1
2.9.2
2.9.3
2.9.4
Overview ........................................................................................................................ 57
3.1.1
3.1.2
Mode Control Register (MDCR) .................................................................................... 59
System Control Register (SYSCR)................................................................................. 60
Operating Mode Descriptions......................................................................................... 62
3.4.1
3.4.2
3.4.3
3.4.4
Pin Functions in Each Operating Mode.......................................................................... 63
Memory Map in Each Operating Mode.......................................................................... 63
Overview ........................................................................................................................ 65
4.1.1
4.1.2
4.1.3
Reset
4.2.1
4.2.2
4.2.3
Interrupts ........................................................................................................................ 70
Trap Instruction............................................................................................................... 71
Stack Status after Exception Handling ........................................................................... 71
Notes on Stack Usage ..................................................................................................... 72
Overview ........................................................................................................................ 73
5.1.1
5.1.2
5.1.3
5.1.4
Overview......................................................................................................... 53
On-Chip Memory Access Timing................................................................... 53
On-Chip Supporting Module Access Timing ................................................. 55
Access to External Address Space.................................................................. 56
Operating Mode Selection .............................................................................. 57
Register Configuration.................................................................................... 58
Mode 1 ............................................................................................................ 62
Mode 2 ............................................................................................................ 62
Mode 3 ............................................................................................................ 62
Mode 4 ............................................................................................................ 62
Exception Handling Types and Priority.......................................................... 65
Exception Handling Operation ....................................................................... 65
Exception Vector Table................................................................................... 66
Overview......................................................................................................... 67
Reset Sequence ............................................................................................... 67
Interrupts after Reset....................................................................................... 69
Features........................................................................................................... 73
Block Diagram................................................................................................ 74
Pin Configuration............................................................................................ 75
Register Configuration.................................................................................... 75
MCU Operating Modes
Exception Handling
Interrupt Controller
........................................................................................................................ 67
................................................................................... 73
.................................................................................. 65
........................................................................... 57
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