HD64F2633RTE28 Renesas Electronics America, HD64F2633RTE28 Datasheet - Page 117

IC H8S MCU FLASH 256K 120-TQFP

HD64F2633RTE28

Manufacturer Part Number
HD64F2633RTE28
Description
IC H8S MCU FLASH 256K 120-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of HD64F2633RTE28

Core Processor
H8S/2600
Core Size
16-Bit
Speed
28MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
73
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2633RTE28V
Manufacturer:
RENESAS
Quantity:
296
Part Number:
HD64F2633RTE28V
Manufacturer:
RENESAS
Quantity:
784
2.2.27 (1)
DIVXS (DIVide eXtend as Signed)
Operation
Rd
Assembly-Language Format
DIVXS.B Rs, Rd
Operand Size
Byte
Description
This instruction divides the contents of a 16-bit register Rd (destination operand) by the contents
of an 8-bit register Rs (source operand) and stores the result in the 16-bit register Rd. The division
is signed. The operation performed is 16 bits
quotient is placed in the lower 8 bits of Rd. The remainder is placed in the upper 8 bits of Rd. The
sign of the remainder matches the sign of the dividend.
Valid results are not assured if division by zero is attempted or an overflow occurs.
Available Registers
Rd: R0 to R7, E0 to E7
Rs: R0L to R7L, R0H to R7H
Rs
Rd
DIVXS (B)
Dividend
16 bits
Rd
Divisor
8 bits
Rs
8 bits
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the quotient is negative;
Z: Set to 1 if the divisor is zero; otherwise
V: Previous value remains unchanged.
C: Previous value remains unchanged.
otherwise cleared to 0.
cleared to 0.
8-bit quotient and 8-bit remainder. The
Remainder
Rev. 4.00 Feb 24, 2006 page 101 of 322
I
8 bits
UI H
Section 2 Instruction Descriptions
Rd
Quotient
U
8 bits
N
REJ09B0139-0400
Z
Divide Signed
— —
V
C