HD64F2633RTE28 Renesas Electronics America, HD64F2633RTE28 Datasheet - Page 247
Manufacturer Part Number
IC H8S MCU FLASH 256K 120-TQFP
Renesas Electronics America
1.D12312SVTE25V.pdf (341 pages)
Specifications of HD64F2633RTE28
I²C, IrDA, SCI, SmartCard
DMA, POR, PWM, WDT
Number Of I /o
Program Memory Size
256KB (256K x 8)
Program Memory Type
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
A/D 16x10b; D/A 4x8b
-20°C ~ 75°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
STMAC (STore from MAC register)
STMAC MAC register, ERd
This instruction moves the contents of a multiply-accumulate register (MACH or MACL) to a
general register. If the transfer is from MACH, the upper 22 bits transferred to the general register
are a sign extension.
This instruction is supported by the H8S/2600 CPU only.
ERd: ER0 to ER7
H: Previous value remains unchanged.
N: Set to 1 if a MAC instruction resulted in a
Z: Set to 1 if a MAC instruction resulted in a
V: Set to 1 if a MAC instruction resulted in
C: Previous value remains unchanged.
Note: * Execution of this instruction copies the N, Z,
negative MAC register value; otherwise
cleared to 0.
zero MAC register value; otherwise
cleared to 0.
an overflow; otherwise cleared to 0.
Rev. 4.00 Feb 24, 2006 page 231 of 322
and V flag values from the multiplier to the
condition-code register (CCR). If the STMAC
instruction is executed after a CLRMAC or
LDMAC instruction with no intervening MAC
instruction, the V flag will be 0 and the N and Z
flags will have undetermined values.
Section 2 Instruction Descriptions
Store Data from MAC Register