HD64F2633RTE28 Renesas Electronics America, HD64F2633RTE28 Datasheet - Page 119
Manufacturer Part Number
IC H8S MCU FLASH 256K 120-TQFP
Renesas Electronics America
1.D12312SVTE25V.pdf (341 pages)
Specifications of HD64F2633RTE28
I²C, IrDA, SCI, SmartCard
DMA, POR, PWM, WDT
Number Of I /o
Program Memory Size
256KB (256K x 8)
Program Memory Type
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
A/D 16x10b; D/A 4x8b
-20°C ~ 75°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
DIVXS (DIVide eXtend as Signed)
DIVXS.W Rs, ERd
This instruction divides the contents of a 32-bit register ERd (destination operand) by the contents
of a 16-bit register Rs (source operand) and stores the result in the 32-bit register ERd. The
division is signed. The operation performed is 32 bits
remainder. The quotient is placed in the lower 16 bits (Rd) of the 32-bit register ERd. The
remainder is placed in the upper 16 bits (Ed). The sign of the remainder matches the sign of the
Valid results are not assured if division by zero is attempted or an overflow occurs.
ERd: ER0 to ER7
R0 to R7, E0 to E7
H: Previous value remains unchanged.
N: Set to 1 if the quotient is negative;
Z: Set to 1 if the divisor is zero; otherwise
V: Previous value remains unchanged.
C: Previous value remains unchanged.
otherwise cleared to 0.
cleared to 0.
Rev. 4.00 Feb 24, 2006 page 103 of 322
Section 2 Instruction Descriptions
16-bit quotient and 16-bit