HD64F2633RTE28 Renesas Electronics America, HD64F2633RTE28 Datasheet - Page 256
Manufacturer Part Number
IC H8S MCU FLASH 256K 120-TQFP
Renesas Electronics America
Specifications of HD64F2633RTE28
I²C, IrDA, SCI, SmartCard
DMA, POR, PWM, WDT
Number Of I /o
Program Memory Size
256KB (256K x 8)
Program Memory Type
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
A/D 16x10b; D/A 4x8b
-20°C ~ 75°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 2 Instruction Descriptions
TRAPA (TRAP Always)
This instruction pushes the program counter (PC) and condition-code register (CCR) onto the
stack, then sets the I bit to 1. If the extended control register (EXR) is valid, EXR is also saved
onto the stack, but bits I2 to I0 are not modified. Next execution branches to a new address given
by the contents of the vector address corresponding to the specified vector number. The PC value
pushed onto the stack is the starting address of the next instruction after the TRAPA instruction.
Rev. 4.00 Feb 24, 2006 page 240 of 322
When EXR is invalid
When EXR is valid
H'0010 to H'0011
H'0012 to H'0013
H'0014 to H'0015
H'0016 to H'0017
UI: See note.
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
Note: * The UI bit is set to 1 when used as an interrupt
Always set to 1.
mask bit, but retains its previous value when
used as a user bit. For details, see the relevant
microcontroller hardware manual.
H'00002C to H'00002F
H'000028 to H'00002B
H'000020 to H'000023
H'000024 to H'000027