HD64F2633RTE28 Renesas Electronics America, HD64F2633RTE28 Datasheet - Page 98
HD64F2633RTE28
Manufacturer Part Number
HD64F2633RTE28
Description
IC H8S MCU FLASH 256K 120-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet
1.D12312SVTE25V.pdf
(341 pages)
Specifications of HD64F2633RTE28
Core Processor
H8S/2600
Core Size
16-Bit
Speed
28MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
73
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Part Number:
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Section 2 Instruction Descriptions
2.2.18
BSR (Branch to SubRoutine)
Operation
PC
PC + disp
Assembly-Language Format
BSR disp
Operand Size
—
Description
This instruction branches to a subroutine at a specified address. It pushes the program counter
(PC) value onto the stack as a restart address, then adds a specified displacement to the PC value
and branches to the resulting address. The PC value pushed onto the stack is the address of the
instruction following the BSR instruction. The displacement is a signed 8-bit or 16-bit value, so
the possible branching range is –126 to +128 bytes or –32766 to +32768 bytes from the address of
the BSR instruction.
Operand Format and Number of States Required for Execution
Rev. 4.00 Feb 24, 2006 page 82 of 322
REJ09B0139-0400
Program-counter
relative
Addressing
Mode
@–SP
BSR
PC
Mnemonic
BSR
Operands
d:16
d:8
1st byte 2nd byte 3rd byte 4th byte
5
5
C
5
Instruction Format
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
0
disp
0
—
I
UI H
—
—
disp
—
U
Branch to Subroutine
—
N
Normal Advanced
—
Z
No. of States
3
4
— —
V
C
4
5
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