HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 227

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

4.6.4
The OC data array is allocated to addresses H'F500 0000 to H'F5FF FFFF in the P4 area. A data
array access requires a 32-bit address field specification (when reading or writing) and a 32-bit
data field specification. The way and entry to be accessed is specified in the address field, and the
longword data to be written is specified in the data field.
In the address field, bits [31:24] have the value H'F5 indicating the OC data array, the way is
specified by bit [14], and the entry by bits [13:5]. CCR.OIX has no effect on this entry
specification. In RAM mode (CCR.ORA = 1), the OC's data arrays are only accessible in the
memory-mapped cache area, and bit [13] is used to specify the way. For details about address
mapping, see section 4.6.5, Summary of the Memory-Mapping of the OC. Address field bits [4:2]
are used for the longword data specification in the entry. As only longword access is used, 0
should be specified for address field bits [1:0].
The data field is used for the longword data specification.
The following two kinds of operation can be used on the OC data array:
1. OC data array read
2. OC data array write
Legend:
L: Longword specification bits
Address field
Longword data is read into the data field from the data specified by the longword specification
bits in the address field in the OC entry corresponding to the way and entry set in the address
field.
The longword data specified in the data field is written for the data specified by the longword
specification bits in the address field in the OC entry corresponding the way and entry set in
the address field. This write does not set the U bit to 1 on the address array side.
Data field
: Reserved bits (0 write value, undefined read value)
OC Data Array
31
31
1 1 1 1 0 1 0 1
Figure 4.15 Memory-Mapped OC Data Array
24
23
Longword data
15
Rev.7.00 Oct. 10, 2008 Page 141 of 1074
Way
14
13
Entry
REJ09B0366-0700
Section 4 Caches
5 4
L
2 1 0
0