HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 459

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
Bit 31—Endian Flag (ENDIAN): Samples the value of the endian specification external pin
(MD5) in a power-on reset by the RESET pin. The endian mode of all spaces is determined by this
bit. ENDIAN is a read-only bit.
Bit 31: ENDIAN
0
1
Bit 30—Master/Slave Flag (MASTER): Samples the value of the master/slave specification
external pin (MD7) in a power-on reset by the RESET pin. The master/slave status of all spaces is
determined by this bit. MASTER is a read-only bit.
Bit 30: MASTER
0
1
Bit 29—Area 0 Memory Type (A0MPX): Samples the value of the area 0 memory type
specification external pin (MD6) in a power-on reset by the RESET pin. The memory type of area
0 is determined by this bit. A0MPX is a read-only bit.
Bit 29: A0MPX
0
1
Bits 28, 27, 26*, 23, 22, 16*, and 1—Reserved: These bits are always read as 0, and should only
be written with 0.
Note: * SH7750, SH7750S only.
Description
In a power-on reset, the endian setting external pin (MD5) is low,
designating big-endian mode
In a power-on reset, the endian setting external pin (MD5) is high,
designating little-endian mode
Description
In a power-on reset, the master/slave setting external pin (MD7) is high,
designating master mode
In a power-on reset, the master/slave setting external pin (MD7) is low,
designating slave mode
Description
In a power-on reset, the external pin specifying the area 0 memory type
(MD6) is high, designating the area 0 as SRAM interface
In a power-on reset, the external pin specifying the area 0 memory type
(MD6) is low, designating the area 0 as MPX interface
Rev.7.00 Oct. 10, 2008 Page 373 of 1074
Section 13 Bus State Controller (BSC)
REJ09B0366-0700

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