MC912DG128ACPV Freescale Semiconductor, MC912DG128ACPV Datasheet - Page 278

no-image

MC912DG128ACPV

Manufacturer Part Number
MC912DG128ACPV
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128ACPV

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912DG128ACPV
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC912DG128ACPV
Manufacturer:
FREE
Quantity:
20 000
Part Number:
MC912DG128ACPV 5K91D
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC912DG128ACPVE
Manufacturer:
MICREL
Quantity:
9 982
Part Number:
MC912DG128ACPVE
Manufacturer:
FREESCALE
Quantity:
1 200
Part Number:
MC912DG128ACPVE
Manufacturer:
FREESCALE
Quantity:
1 970
Part Number:
MC912DG128ACPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC912DG128ACPVE
Manufacturer:
FREESCALE
Quantity:
1 970
Part Number:
MC912DG128ACPVER
Manufacturer:
STM
Quantity:
1 244
Part Number:
MC912DG128ACPVER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Multiple Serial Interface
16.3 Block diagram
16.4 Serial Communication Interface (SCI)
Technical Data
278
MSI
Figure 16-1. Multiple Serial Interface Block Diagram
Two serial communication interfaces are available on the
MC68HC912DT128A. These are NRZ format (one start, eight or nine
data, and one stop bit) asynchronous communication systems with
independent internal baud rate generation circuitry and SCI transmitters
and receivers. They can be configured for eight or nine data bits (one of
which may be designated as a parity bit, odd or even). If enabled, parity
is generated in hardware for transmitted and received data. Receiver
parity errors are flagged in hardware. The baud rate generator is based
on a modulus counter, allowing flexibility in choosing baud rates. There
is a receiver wake-up feature, an idle line detect feature, a loop-back
mode, and various error detection features. Two port pins for each SCI
provide the external interface for the transmitted data (TXD) and the
received data (RXD).
For a faster wake-up out of WAIT mode by a received SCI message,
both SCI have the capability of sending a receiver interrupt, if enabled,
when RAF (receiver active flag) is set. For compatibility with other
M68HC12 products, this feature is active only in WAIT mode and is
disabled when VDDPLL supply is at V
Freescale Semiconductor, Inc.
For More Information On This Product,
SCI0
SCI1
SPI
Go to: www.freescale.com
Multiple Serial Interface
MOSI/MOMI
MISO/SISO
CS/SS
RxD0
RxD1
TxD0
TxD1
SCK
SS
level.
MC68HC912DT128A — Rev 4.0
HC12A4 MSI BLOCK
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
MOTOROLA

Related parts for MC912DG128ACPV