MC912DG128ACPV Freescale Semiconductor, MC912DG128ACPV Datasheet - Page 475

• Manufacturer Part Number: MC912DG128ACPV
• Description: IC MCU 128K FLASH 8MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912DG128ACPV

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

24.11 Changes from Rev 1.0 to Rev 2.0
24.12 Changes from first version (internal release, no revision number) to
MC68HC912DT128A — Rev 4.0
MOTOROLA
General Description
Pinout and Signal
Clock Functions
Characteristics
Descriptions
Rev 1.0
Appendix A
Appendix B
EEPROM
EEPROM
Registers
Electrical
Section
Section
ECT
ATD
Page (in Rev 2.0)
Page (in Rev 1.0)
143 to 153
353, 354
Freescale Semiconductor, Inc.
30, 31
104
160
161
164
194
321
361
369
377
380
109
33
35
35
55
21
For More Information On This Product,
Go to: www.freescale.com
Figures 4 and 5, pin 97 changed to TEST and note added.
Note added about connection of power supplies.
Note about non-standard oscillator circuit expanded.
Additional paragraphs added covering DC bias.
CD bit name corrected in ATD0CTL5.
New section added ‘EEPROM Selective Write More Zeros’
Major rewrite of Limp Home and Fast STOP Recovery section.
System Clock Frequency Formulae updated for clarification.
Figure 18 modified for clarification.
Figure 21 modified for clarification.
Figure 28 modified for clarification.
Shading removed from CC bit in table 52. CD bit name corrected.
Preliminary notes removed.
EEPROM Programming Maximum Time to ‘AUTO’ Bit Set and
EEPROM Erasing Maximum Time to ‘AUTO’ Bit Set added to
table 71.
Several values in table 76 updated.
New section added ‘2d. EEPROM Selective Write More Zeros’.
New section added ‘6. Port ADx’.
New section added ‘7. ATD’.
New section added ‘DC Bias’.
Ordering Information updated.
Addition of Caution regarding attempts to erase or program
protected locations.
Revision History
Description of change
Description of change
Changes from Rev 1.0 to Rev 2.0
Revision History
Technical Data
475