MC912DG128ACPV Freescale Semiconductor, MC912DG128ACPV Datasheet - Page 293

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MC912DG128ACPV

Manufacturer Part Number
MC912DG128ACPV
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128ACPV

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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16.5.3 SS Output
MC68HC912DT128A — Rev 4.0
MOTOROLA
SCK (CPOL=0)
SCK (CPOL=1)
SAMPLE I
(MOSI/MISO)
CHANGE O
CHANGE O
SEL SS (O)
(Master only)
SEL SS (I)
(MOSI pin)
(MISO pin)
MSB first (LSBF=0):
LSB first (LSBF=1):
Transfer
t
L
Available in master mode only, SS output is enabled with the SSOE bit
in the SP0CR1 register if the corresponding DDRS is set. The SS output
pin will be connected to the SS input pin of the external slave device. The
SS output automatically goes low for each transmission to select the
external device and it goes high during each idling state to deselect
external devices.
Figure 16-5. SPI Clock Format 1 (CPHA = 1)
MSB
LSB
Freescale Semiconductor, Inc.
For More Information On This Product,
DDRS7
Begin
Bit 6
Bit 1
0
0
1
1
Go to: www.freescale.com
Multiple Serial Interface
Bit 5
Bit 2
SSOE
Table 16-3. SS Output Selection
0
1
0
1
Bit 4
Bit 3
SS Input with MODF Feature
General-Purpose Output
Bit 3
Bit 4
Master Mode
SS Output
Reserved
Bit 2
Bit 5
Bit 1
Bit 6
End
Serial Peripheral Interface (SPI)
MSB
LSB
Multiple Serial Interface
t
T
Slave Mode
Minimum 1/2 SCK
SS Input
SS Input
SS Input
SS Input
t
HC12 SPI CLOCK FORM 1
I
for t
Technical Data
T
t
L
, t
l
, t
L
293

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