MC912DG128ACPV Freescale Semiconductor, MC912DG128ACPV Datasheet - Page 312

• Manufacturer Part Number: MC912DG128ACPV
• Description: IC MCU 128K FLASH 8MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912DG128ACPV

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

IBCR — IIC Bus Control Register
Inter IC Bus
Technical Data
312
RESET:
IBEN
Bit 7
NOTE:
0
IBIE
6
0
Read and write anytime
IBEN — IIC Bus Enable
To prevent glitches from appearing on the SDA & SCL lines during reset
of the IIC module, set PORTIB bit 6 & 7 to 1 before clearing the IBEN bit.
IBC5-0
(hex)
This bit controls the software reset of the entire IIC module.
If the IIC module is enabled in the middle of a byte transfer the
interface behaves as follows: slave mode ignores the current transfer
on the bus and starts operating whenever a subsequent start
condition is detected. Master mode will not be aware that the bus is
busy, hence if a start cycle is initiated then the current bus cycle may
become corrupt. This would ultimately result in either the current bus
master or the IIC module losing arbitration, after which bus operation
would return to normal.
Freescale Semiconductor, Inc.
1B
1C
1D
1E
1F
For More Information On This Product,
0 = The module is reset and disabled. This is the power-on reset
1 = The IIC system is enabled. This bit must be set before any other
MS/SL
5
0
situation. When low the IIC system is held in reset but registers
can still be accessed.
IBCR bits have any effect.
SCL Divider
(clocks)
Go to: www.freescale.com
Table 17-2. IIC Divider and SDA Hold values
128
144
160
192
240
Tx/Rx
4
0
Inter IC Bus
SDA Hold
(clocks)
TXAK
17
25
25
33
33
3
0
RSTA
2
0
IBC5-0
(hex)
3C
3D
3B
3E
3F
MC68HC912DT128A — Rev 4.0
1
0
0
SCL Divider
(clocks)
2048
2304
2560
3072
3840
IBSWAI
Bit 0
0
MOTOROLA
SDA Hold
(clocks)
257
385
385
513
513
$00E2