MC912DG128ACPV Freescale Semiconductor, MC912DG128ACPV Datasheet - Page 402

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MC912DG128ACPV

Manufacturer Part Number
MC912DG128ACPV
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128ACPV

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Development Support
Technical Data
402
WRITE_BD_WORD
READ_BD_WORD
WRITE_BD_BYTE
1. Use these commands only for reading/writing to BDM locations
READ_BD_BYTE
BACKGROUND
WRITE_WORD
mally in the HC12 MCU memory map
memory map, there needs to be a way to decide which physical locations are being accessed by the hardware BDM com-
mands
application locations
cycles of the READ_BD and WRITE_BD commands
BDM locations even if the application program is running out of the same memory area in the normal application memory
map
READ_WORD
WRITE_BYTE
READ_BYTE
Command
.
.
This gives rise to needing separate memory access commands for the BDM locations as opposed to the normal
(1)
(1)
(1)
(1)
.
In logic, this is accomplished by momentarily enabling the BDM memory resources, just for the access
Opcode (Hex)
The second type of BDM commands are called firmware commands
implemented in a small ROM within the HC12 MCU.The CPU must be in
background mode to execute firmware commands. The usual way to get
to background mode is by the hardware command BACKGROUND. The
BDM ROM is located at $FF20 to $FFFF while BDM is active. There are
also seven bytes of BDM registers located at $FF00 to $FF06 while BDM
is active. The CPU executes code in the BDM firmware to perform the
requested operation. The BDM firmware watches for serial commands
CC
EC
C8
E4
E0
E8
C4
C0
90
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 20-2. Hardware Commands
.
Since these locations have the same addresses as some of the normal application
16-bit data out
16-bit data out
16-bit data out
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit data out
16-bit data in
16-bit data in
16-bit data in
16-bit data in
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None
Development Support
Data
.
This logic allows the debugging system to unobtrusively access the
Enter background mode if firmware enabled.
Read from memory with BDM in map (may steal cycles
Read from memory with BDM in map (may steal cycles
Read from memory with BDM out of map (may steal
Read from memory with BDM out of map (may steal
Write to memory with BDM in map (may steal cycles if
Write to memory with BDM in map (may steal cycles if
Write to memory with BDM out of map (may steal cycles
Write to memory with BDM out of map (may steal cycles
if external access) data for odd address on low byte,
data for even address on high byte.
if external access). Must be aligned access.
cycles if external access) data for odd address on low
byte, data for even address on high byte.
cycles if external access). Must be aligned access.
external access) data for odd address on low byte,
data for even address on high byte.
external access). Must be aligned access.
if external access) data for odd address on low byte,
data for even address on high byte.
if external access). Must be aligned access.
.
The BDM firmware ROM and BDM registers are not nor-
(1)
Description
MC68HC912DT128A — Rev 4.0
MOTOROLA

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