SI1005-C-GM Silicon Laboratories Inc, SI1005-C-GM Datasheet - Page 223

• Manufacturer Part Number: SI1005-C-GM
• Description: IC TXRX MCU + EZRADIOPRO
• Manufacturer: Silicon Laboratories Inc

Specifications of SI1005-C-GM

• Package / Case: 42-QFN
• Frequency: 240MHz ~ 960MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Applications: General Purpose
• Power - Output: 13dBm
• Sensitivity: -121dBm
• Voltage - Supply: 0.9 V ~ 1.8 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Memory Size: 32kB Flash, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 960 MHz
• Interface Type: UART, SMBus, SPI, PCA
• Output Power: 13 dBm
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 4.1 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Protocol Supported: C2, SMBus
• Core: 8051
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 4352 B
• Supply Current (max): 4.1 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1875-5

SFR Definition 21.13. P1: Port1
SFR Page = All Pages; SFR Address = 0x90; Bit-Addressable
SFR Definition 21.14. P1SKIP: Port1 Skip
SFR Page = 0x0; SFR Address = 0xD5
Note: P1.0, P1.1, P1.2, and P1.4 are internally connected to the EZRadioPRO peripheral. P1.3 is not externally or
Note: P1.0, P1.1, P1.2, and P1.4 are internally connected to the EZRadioPRO peripheral. P1.3 is not externally or
Name
Reset
Name
Reset
Type
Type
Bit
7:0
7:0
Bit
Bit
Bit
P1SKIP[7:0] Port 1 Crossbar Skip Enable Bits.
internally connected.
internally connected. P1.3 and P1.4 should always be skipped in the crossbar.
Name
P1[7:0]
Name
7
1
7
0
Port 1 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
These bits select Port 1 pins to be skipped by the Crossbar Decoder. Port pins used
for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P1.n pin is not skipped by the Crossbar.
1: Corresponding P1.n pin is skipped by the Crossbar.
6
1
6
0
Description
5
1
5
0
Rev. 1.0
4
1
4
0
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
P1SKIP[7:0]
P1[7:0]
R/W
R/W
Function
Write
3
1
3
0
Si1000/1/2/3/4/5
2
1
2
0
0: P1.n Port pin is logic
LOW.
1: P1.n Port pin is logic
HIGH.
1
1
1
0
Read
0
1
0
0
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