SI1005-C-GM Silicon Laboratories Inc, SI1005-C-GM Datasheet - Page 256

• Manufacturer Part Number: SI1005-C-GM
• Description: IC TXRX MCU + EZRADIOPRO
• Manufacturer: Silicon Laboratories Inc

Specifications of SI1005-C-GM

• Package / Case: 42-QFN
• Frequency: 240MHz ~ 960MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Applications: General Purpose
• Power - Output: 13dBm
• Sensitivity: -121dBm
• Voltage - Supply: 0.9 V ~ 1.8 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Memory Size: 32kB Flash, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 960 MHz
• Interface Type: UART, SMBus, SPI, PCA
• Output Power: 13 dBm
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 4.1 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Protocol Supported: C2, SMBus
• Core: 8051
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 4352 B
• Supply Current (max): 4.1 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1875-5

Si1000/1/2/3/4/5
mode it will be the data to be modulated and transmitted. In RX mode it will be the received demodulated
data. Figure 23.9 demonstrates using MOSI and MISO as the TX/RX data and clock:
If the MISO pin is not used for data clock then it may be programmed to be the interrupt function (nIRQ) by
programming Reg 0Eh bit 3.
23.4.3. PN9 Mode
In this mode the TX Data is generated internally using a pseudorandom (PN9 sequence) bit generator. The
primary purpose of this mode is for use as a test mode to observe the modulated spectrum without having
to provide data.
23.5. Internal Functional Blocks
This section provides an overview some of the key blocks of the internal radio architecture.
23.5.1. RX LNA
Depending on the part, the input frequency range for the LNA is between 240–960 MHz. The LNA provides
gain with a noise figure low enough to suppress the noise of the following stages. The LNA has one step of
gain control which is controlled by the analog gain control (AGC) algorithm. The AGC algorithm adjusts the
gain of the LNA and PGA so the receiver can handle signal levels from sensitivity to +5 dBm with optimal
performance.
In the Si1002/3, the TX and RX may be tied directly. See the TX/RX direct-tie reference design available
on www.silabs.com. When the direct tie is used the lna_sw bit in Register 6Dh, TX Power must be set.
23.5.2. RX I-Q Mixer
The output of the LNA is fed internally to the input of the receive mixer. The receive mixer is implemented
as an I-Q mixer that provides both I and Q channel outputs to the programmable gain amplifier. The mixer
consists of two double-balanced mixers whose RF inputs are driven in parallel, local oscillator (LO) inputs
are driven in quadrature, and separate I and Q Intermediate Frequency (IF) outputs drive the programma-
ble gain amplifier. The receive LO signal is supplied by an integrated VCO and PLL synthesizer operating
between 240–960 MHz. The necessary quadrature LO signals are derived from the divider at the VCO out-
put.
23.5.3. Programmable Gain Amplifier
The programmable gain amplifier (PGA) provides the necessary gain to boost the signal level into the
dynamic range of the ADC. The PGA must also have enough gain switching to allow for large input signals
to ensure a linear RSSI range up to –20 dBm. The PGA has steps of 3 dB which are controlled by the AGC
algorithm in the digital modem.
256
MOSI
MSIO
NSS
SPI output
SPI input
don’t care
don’t care
Figure 23.9. Microcontroller Connections
SPI output
command
SPI input
TX on
MOD input
Data CLK
TX mode
Output
Rev. 1.0
SPI output
command
SPI input
TX off
don’t care
don’t care
SPI output
command
SPI input
RX on
Data output
Data CLK
Output
RX mode
SPI output
command
SPI input
RX off