DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 103

• Manufacturer Part Number: DK-DEV-5M570ZN
• Description: KIT DEV MAX V 5M570Z
• Manufacturer: Altera
• Series: MAX® Vr
• Type: CPLDr

Specifications of DK-DEV-5M570ZN

• Contents: Board, Cable(s), Software and Documentation
• Silicon Manufacturer: Altera
• Core Architecture: CPLD
• Core Sub-architecture: MAX
• Silicon Core Number: 5M
• Silicon Family Name: MAX V
• Kit Contents: MAX V CPLD Development Board, USB Cable
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: 5M570ZF256
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2722

MV51007-1.1
UFM Array Description
© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat. & Tm. Off.
and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademarks and service marks are the property of their respective holders as described at
www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but
reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
MAX V Device Handbook
January 2011
January 2011
MV51007-1.1
This chapter provides guidelines for user flash memory (UFM) applications by
describing the features and functionality of the MAX
Quartus
Altera
information up to 8 Kbits, similar to a serial EEPROM. The UFM provides an ideal
storage solution that supports all protocols (serial peripheral interface (SPI), parallel,
and other protocols) for interfacing through bridging logic designed into the MAX V
logic array.
This chapter contains the following sections:
■
■
■
■
■
■
■
Each UFM array is organized as two separate sectors with 4,096 bits per sector. Each
sector can be erased independently.
Table 7–1. UFM Array Size
5M40Z
5M80Z
5M160Z
5M240Z
5M570Z
5M1270Z
5M2210Z
“UFM Array Description” on page 7–1
“UFM Functional Description” on page 7–3
“UFM Operating Modes” on page 7–8
“Programming and Reading the UFM with JTAG” on page 7–12
“Software Support for UFM Block” on page 7–13
“Creating Memory Content File” on page 7–39
“Simulation Parameters” on page 7–43
Device
®
MAX V devices feature a UFM block that can be used for storing non-volatile
®
II ALTUFM megafunction.
Total Bits
7. User Flash Memory in MAX V Devices
8,192
8,192
8,192
8,192
8,192
8,192
8,192
2 (4,096 bits per sector)
2 (4,096 bits per sector)
2 (4,096 bits per sector)
2 (4,096 bits per sector)
2 (4,096 bits per sector)
2 (4,096 bits per sector)
2 (4,096 bits per sector)
Table 7–1
Sectors
lists the dimensions of the UFM array.
®
V UFM block and the
Address Bits
9
9
9
9
9
9
9
Data Width
16
16
16
16
16
16
16
Subscribe