DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 143
![KIT DEV MAX V 5M570Z](/photos/18/31/183180/dk-dev-5m570zn_sml.jpg)
DK-DEV-5M570ZN
Manufacturer Part Number
DK-DEV-5M570ZN
Description
KIT DEV MAX V 5M570Z
Manufacturer
Altera
Series
MAX® Vr
Type
CPLDr
Datasheets
1.DK-DEV-5M570ZN.pdf
(30 pages)
2.DK-DEV-5M570ZN.pdf
(2 pages)
3.DK-DEV-5M570ZN.pdf
(30 pages)
4.DK-DEV-5M570ZN.pdf
(164 pages)
5.DK-DEV-5M570ZN.pdf
(24 pages)
Specifications of DK-DEV-5M570ZN
Contents
Board, Cable(s), Software and Documentation
Silicon Manufacturer
Altera
Core Architecture
CPLD
Core Sub-architecture
MAX
Silicon Core Number
5M
Silicon Family Name
MAX V
Kit Contents
MAX V CPLD Development Board, USB Cable
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
5M570ZF256
Lead Free Status / Rohs Status
Compliant
Other names
544-2722
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Chapter 7: User Flash Memory in MAX V Devices
Creating Memory Content File
Figure 7–38. Memory Map for 2-Kbit Memory Initialization
January 2011 Altera Corporation
2-Kbit ALTUFM_I2C Megafunction
Upper Half – Addresses
Lower Half – Addresses
Logical Memory Contents
80h to FFh
00h to 7Fh
Memory Map for 2-Kbit Memory Initialization
Figure 7–38
of 2 Kbits of memory. The ALTUFM_I2C megafunction byte address location of 00h to
7Fh is mapped to the UFM block address location of 000h to 07Fh. The ALTUFM_I2C
megafunction byte address location of 80h to FFh is mapped to the UFM block address
location of 180h to 1FFh. Altera recommends that you pad the unused address location
of the UFM block with all 1s.
FFh
shows the memory map initialization for the ALTUFM_I2C megafunction
80h
00h
7Fh
1FFh
180h
17Fh
07Fh
080h
000h
the actual data and address size for the UFM block
memory maps to 1FFh in the MIF/HEX file, and all
logical memory maps to 07Fh in the MIF/HEX file,
address 000h in the MIF/HEX file. Address 7Fh in
address 180h in the MIF/HEX file. FFh in logical
MIF or HEX File Contents – to represent
and all data in between follows the order in the
the MIF/HEX file contents should be set to
Address 80h in logical memory maps to
Address 00h in logical memory maps to
data in between follows the order in the
This section of the UFM is unused –
all '1' for addresses 080h to 17Fh
logical memory
logical memory
MAX V Device Handbook
7–41
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