DK-DEV-5M570ZN Altera, DK-DEV-5M570ZN Datasheet - Page 89
DK-DEV-5M570ZN
Manufacturer Part Number
DK-DEV-5M570ZN
Description
KIT DEV MAX V 5M570Z
Manufacturer
Altera
Series
MAX® Vr
Type
CPLDr
Datasheets
1.DK-DEV-5M570ZN.pdf
(30 pages)
2.DK-DEV-5M570ZN.pdf
(2 pages)
3.DK-DEV-5M570ZN.pdf
(30 pages)
4.DK-DEV-5M570ZN.pdf
(164 pages)
5.DK-DEV-5M570ZN.pdf
(24 pages)
Specifications of DK-DEV-5M570ZN
Contents
Board, Cable(s), Software and Documentation
Silicon Manufacturer
Altera
Core Architecture
CPLD
Core Sub-architecture
MAX
Silicon Core Number
5M
Silicon Family Name
MAX V
Kit Contents
MAX V CPLD Development Board, USB Cable
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
5M570ZF256
Lead Free Status / Rohs Status
Compliant
Other names
544-2722
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Chapter 5: Using MAX V Devices in Multi-Voltage Systems
MultiVolt I/O Operation
MultiVolt I/O Operation
5.0-V Device Compatibility
December 2010 Altera Corporation
MAX V devices allow the device core and I/O blocks to be powered-up with separate
supply voltages. The VCCINT pins supply power to the device core and the VCCIO pins
supply power to the device I/O buffers. The VCCINT pins are powered-up with 1.8 V
for MAX V devices. All the VCCIO pins for a given I/O bank that have MultiVolt
capability must be supplied from the same voltage level (for example, 5.0, 3.3, 2.5, 1.8,
1.5, or 1.2 V).
MAX V devices.
Figure 5–2. Implementing a Multi-Voltage System with a MAX V Device
A MAX V device can drive a 5.0-V TTL device by connecting the VCCIO pins of the
MAX V device to 3.3 V. This is possible because the output high voltage (V
3.3-V interface meets the minimum high-level voltage of 2.4 V of a 5.0-V TTL device.
A MAX V device may not correctly interoperate with a 5.0-V CMOS device if the
output of the MAX V device is connected directly to the input of the 5.0-V CMOS
device. If the MAX V device‘s V
still conducts if the pin is driving high, preventing an external pull-up resistor from
pulling the signal to 5.0 V. To make MAX V device outputs compatible with 5.0-V
CMOS devices, configure the output pins as open-drain pins with the I/O clamp
diode enabled and use an external pull-up resistor.
Notes to
(1) MAX V devices can drive a 5.0-V transistor-to-transistor logic (TTL) input when V
(2) MAX V devices can be 5.0-V tolerant with the use of an external resistor and the internal I/O clamp diode on
CMOS, you must have an open-drain setting with an internal I/O clamp diode and external resistor.
5M1270Z and 5M2210Z devices.
Figure
5–2:
Figure 5–2
Device
5.0-V
shows how to implement a multiple-voltage system for
V
CCIO
OUT
is greater than V
Power Supply
MAX V
Device
1.8-V
V
CCINT
CCIO
V
, the PMOS pull-up transistor
CCIO
CCIO
3.3-, 2.5-, 1.8-,
(Note
1.5-, 1.2-V
= 3.3 V. To drive a 5.0-V
Device
MAX V Device Handbook
1),
(2)
OH
) of a
5–3
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