MB95F126JBPFR-GE1 Fujitsu, MB95F126JBPFR-GE1 Datasheet - Page 29

• Manufacturer Part Number: MB95F126JBPFR-GE1
• Description: MCU, 8-BIT, 8FX, 32K FLASH, QFP100
• Manufacturer: Fujitsu

Specifications of MB95F126JBPFR-GE1

• Controller Family/series: F2MC-8FX
• No. Of I/o's: 87
• Ram Memory Size: 1KB
• Cpu Speed: 16.25MHz
• No. Of Timers: 7
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External Only

DS07-12610-5E
Address
007C
007D
0F9A
007A
007B
007E
007F
0F80
0F81
0F82
0F83
0F84
0F85
0F86
0F87
0F88
0F89
0F91
0F92
0F93
0F94
0F95
0F96
0F97
0F98
0F99
0073
0074
0075
0076
0077
0078
0079
to
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
abbreviation
WRARH0
WRARH1
WRARH2
WRARL0
WRARL1
WRARL2
Register
WRDR0
WRDR1
WRDR2
T01CR0
T00CR0
T11CR0
T10CR0
SWRE0
SWRE1
TMCR0
WROR
T01DR
T00DR
T11DR
T10DR
WREN
ILR0
ILR1
ILR2
ILR3
ILR4
ILR5
⎯
⎯
⎯
⎯
8/16-bit compound timer 00/01 timer mode control register
8/16-bit compound timer 01 control status register 0 ch.0
8/16-bit compound timer 00 control status register 0 ch.0
8/16-bit compound timer 11 control status register 0 ch.1
8/16-bit compound timer 10 control status register 0 ch.1
Wild register address setting register (upper byte) ch.0
Wild register address setting register (upper byte) ch.1
Wild register address setting register (upper byte) ch.2
Wild register address setting register (lower byte) ch.0
Wild register address setting register (lower byte) ch.1
Wild register address setting register (lower byte) ch.2
Wild register address compare enable register
8/16-bit compound timer 01 data register ch.0
8/16-bit compound timer 00 data register ch.0
8/16-bit compound timer 11 data register ch.1
8/16-bit compound timer 10 data register ch.1
Flash memory sector writing control register 0
Flash memory sector writing control register 1
Wild register data setting register ch.0
Wild register data setting register ch.1
Wild register data setting register ch.2
Wild register data test setting register
Mirror of direct bank pointer (DP)
Interrupt level setting register 0
Interrupt level setting register 1
Interrupt level setting register 2
Interrupt level setting register 3
Interrupt level setting register 4
Interrupt level setting register 5
Register bank pointer (RP) ,
Register name
(Disabled)
(Disabled)
(Disabled)
ch.0
MB95120MB Series
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
⎯
⎯
⎯
⎯
Initial value
00000000
00000000
00000000
00000000
11111111
11111111
11111111
11111111
11111111
11111111
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
(Continued)
⎯
⎯
⎯
⎯
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
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