MB95F126JBPFR-GE1 Fujitsu, MB95F126JBPFR-GE1 Datasheet - Page 44

• Manufacturer Part Number: MB95F126JBPFR-GE1
• Description: MCU, 8-BIT, 8FX, 32K FLASH, QFP100
• Manufacturer: Fujitsu

Specifications of MB95F126JBPFR-GE1

• Controller Family/series: F2MC-8FX
• No. Of I/o's: 87
• Ram Memory Size: 1KB
• Cpu Speed: 16.25MHz
• No. Of Timers: 7
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External Only

MB95120MB Series
44
(2) Source Clock/Machine Clock
*1 : Clock before setting division due to machine clock division ratio selection bit (SYCC : DIV1 and DIV0) . This
*
Source clock cycle time*
division)
Source clock frequency
Machine clock cycle time*
execution time)
Machine clock frequency
2
(Clock before setting
(Minimum instruction
• Outline of clock generation block
: Operation clock of the microcontroller. Machine clock can be selected as follows.
source clock is divided by the machine clock division ratio selection bit (SYCC : DIV1 and DIV0) , and it becomes
the machine clock. Further, the source clock can be selected as follows.
• Main clock divided by 2
• PLL multiplication of main clock (select from 1, 2, 2.5, 4 multiplication)
• Sub clock divided by 2
• PLL multiplication of sub clock (select from 2, 3, 4 multiplication)
• Source clock (no division)
• Source clock divided by 4
• Source clock divided by 8
• Source clock divided by 16
Parameter
(main oscillation)
(sub oscillation)
F
F
CH
CL
1
2
Symbol
t
t
F
F
F
SCLK
F
MCLK
SPL
MPL
MP
SP
Divided by 2
Divided by 2
Main PLL
Sub PLL
× 2.5
× 1
× 2
× 4
× 2
× 3
× 4
Condi-
tion
⎯
(V
CC
16.384
0.031
1.024
61.5
0.50
61.5
Min
7.6
7.6
(SYCC: SCS1, SCS0)
Clock mode select bit
= 5.0 V ± 10%, AV
Value
(source clock)
131.072
131.072
16.250
32000
16.25
976.5
2000
SCLK
Max
61.0
Unit
MHz When using main clock
MHz When using main clock
kHz When using sub clock
kHz When using sub clock
SS
ns
μs
ns
μs
Division
= V
circuit
× 1/16
× 1/4
× 1/8
× 1
When using main clock
Min : F
PLL multiplied by 2
Max : F
When using sub clock
Min : F
PLL multiplied by 4
Max : F
When using main clock
Min : F
Max : F
When using sub clock
Min : F
Max : F
SS
= 0.0 V, T
CH
CL
SP
SPL
CH
CL
SP
SPL
(machine clock)
= 32 kHz,
= 16.25 MHz, no division
= 8.125 MHz,
= 32 kHz, divided by 2
= 0.5 MHz, divided by 16
= 131 kHz, no division
= 1 MHz, divided by 2
= 16 kHz, divided by 16
A
MCLK
= − 40 °C to + 105 °C)
Remarks
DS07-12610-5E