MB95F126JBPFR-GE1 Fujitsu, MB95F126JBPFR-GE1 Datasheet - Page 51
MB95F126JBPFR-GE1
Manufacturer Part Number
MB95F126JBPFR-GE1
Description
MCU, 8-BIT, 8FX, 32K FLASH, QFP100
Manufacturer
Fujitsu
Datasheet
1.MB95F126JBPF-GE1.pdf
(80 pages)
Specifications of MB95F126JBPFR-GE1
Controller Family/series
F2MC-8FX
No. Of I/o's
87
Ram Memory Size
1KB
Cpu Speed
16.25MHz
No. Of Timers
7
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External Only
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DS07-12610-5E
Sampling at the rising edge of sampling clock*
*1 : Provide switch function whether sampling of reception data is performed at rising edge or falling edge of the
*2 : Serial clock delay function is used to delay half clock for the output signal of serial clock.
*3 : Refer to “ (2) Source Clock/Machine Clock” for t
(7) LIN-UART Timing
(ESCR register : SCES bit = 0, ECCR register : SCDE bit = 0)
Serial clock cycle time
SCK ↓ → SOT delay time
Valid SIN → SCK ↑
SCK ↑ → valid SIN hold time
Serial clock “L” pulse width
Serial clock “H” pulse width
SCK ↓ → SOT delay time
Valid SIN → SCK ↑
SCK ↑ → valid SIN hold time
SCK fall time
SCK rise time
serial clock.
Parameter
Sym-
t
t
t
t
t
t
t
t
t
SLOVE
bol
SLOVI
IVSHE
SHIXE
SCYC
IVSHI
SHIXI
SLSH
SHSL
t
t
R
F
SCK, SOT
SCK, SOT
Pin name
SCK, SIN
SCK, SIN
SCK, SIN
SCK, SIN
SCK
SCK
SCK
SCK
SCK
(V
1
CC
and prohibited serial clock delay*
MCLK
operation output pin :
operation output pin :
= 5.0 V ± 10%, AV
C
C
L
L
External clock
.
= 80 pF + 1 TTL.
= 80 pF + 1 TTL.
Internal clock
Condition
MB95120MB Series
SS
= V
t
3 t
MCLK
t
t
MCLK
MCLK
SS
5 t
MCLK
= 0.0 V, T
Min
−95
*
190
MCLK
*
⎯
*
⎯
⎯
3
0
3
3
*
+ 190
3
+ 95
+ 95
*
− t
3
Value
R
2
A
= −40 °C to + 105 °C)
2 t
MCLK
Max
+95
10
10
⎯
⎯
⎯
⎯
⎯
⎯
⎯
*
3
+ 95
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
51
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