IPR-PCI/MT64 Altera, IPR-PCI/MT64 Datasheet - Page 245
IPR-PCI/MT64
Manufacturer Part Number
IPR-PCI/MT64
Description
IP CORE Renewal Of IP-PCI/MT64
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-PCI/MT64
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Compiler, Master/Target, 64 bit
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
- Current page: 245 of 358
- Download datasheet (3Mb)
Simulate the
Design
Altera Corporation
January 2011
f
SOPC Builder automatically sets up the simulation environment for the
PCI Compiler.
SOPC Builder creates the pci_sim directory in your project directory and
copies the testbench files from
<path>/pci_compiler/testbench/sopc/<language>/<core> to the pci_sim
directory.
1
This section of the walkthrough uses the following components:
■
■
■
■
SOPC Builder creates IP functional simulation models for all the system
components. The IP functional simulation models are the .vo or .vho files
generated by SOPC Builder in your project directory.
For more information on IP functional simulation models, refer to the
Simulating Altera IP in Third-Party Simulation Tools
the Quartus II Handbook.
The SOPC Builder-generated top-level file also integrates the simulation
modules of the system components and testbenches (if available),
including the PCI testbench. The Altera-provided PCI testbench can be
used to verify the basic functionality of your PCI compiler system. SOPC
Builder automatically configures the PCI testbench and copies the
necessary files to your project directory in the pci_sim directory. The
default configuration of the PCI testbench is predefined to run basic PCI
configuration transactions to the PCI device in your SOPC Builder
generated system. You can edit the PCI testbench mstr_tranx.v or
mstr_tranx.vhd file to add more interesting PCI transactions.
The system you created using SOPC Builder
Scripts created by SOPC Builder in the c:\sopc_pci\chip_top_sim
directory
The ModelSim software
1
The PCI testbench files located in the c:\sopc_pci\pci_sim directory
The testbench files must be edited to add the PCI transactions
that will be performed on the system. If you regenerate your
system, SOPC Builder will not overwrite the testbench files in
the pci_sim directory. If you want to use the default testbench
files, first delete the pci_sim directory and then regenerate your
system.
PCI Compiler Version 10.1
You can also use any other supported third-party simulator.
PCI Compiler User Guide
chapter in volume 3 of
Getting Started
5–11
Related parts for IPR-PCI/MT64
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
IP CORE Renewal Of IP-PCI/MT32
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCI/T32
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCI/T64
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCIE/1
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCIE/4
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCIE/8
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet: