IPR-PCI/MT64 Altera, IPR-PCI/MT64 Datasheet - Page 96
IPR-PCI/MT64
Manufacturer Part Number
IPR-PCI/MT64
Description
IP CORE Renewal Of IP-PCI/MT64
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-PCI/MT64
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Compiler, Master/Target, 64 bit
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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PCI Bus Signals
3–22
PCI Compiler User Guide
lt_tsr[11..0]
lirqn
Table 3–7. Target Signals Connecting to the Local Side (Part 3 of 3)
Name
Output
Input
Type
–
Low
Polarity
PCI Compiler Version 10.1
Local target transaction status register. The
bus carries several signals which can be monitored for the
transaction status. Refer to
Local interrupt request. The local-side peripheral device
asserts
signal forces the PCI MegaCore function to assert the
signal for as long as the
int_dis
lirqn
bit (bit 10 of the command register) is 0.
to signal a PCI bus interrupt. Asserting this
lirqn
Description
Table
signal is asserted and the
3–8.
Altera Corporation
lt_tsr
January 2011
[
11..0]
intan
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