IPR-PCI/MT64 Altera, IPR-PCI/MT64 Datasheet - Page 246
IPR-PCI/MT64
Manufacturer Part Number
IPR-PCI/MT64
Description
IP CORE Renewal Of IP-PCI/MT64
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-PCI/MT64
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Compiler, Master/Target, 64 bit
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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PCI Compiler with SOPC Builder Flow Design Walkthrough
5–12
PCI Compiler User Guide
f
You can also copy the mstr_tranx.v file from the SOPC Builder example
directory located at <path>/pci_compiler/sopc_flow_examples/verilog/
pci_sim/verilog/mt32.
For more information on the PCI testbench files refer to
Testbench.
For this walkthrough, perform the following steps:
1.
2.
3.
4.
5.
6.
View the following PCI transactions in the ModelSim Wave - Default
window:
■
Start the ModelSim simulator.
In the simulator, change your working directory to
c:\sopc_pci\chip_top_sim.
To run the script, type the following command at the simulator
command prompt:
source setup_sim.do r
To compile all the files and load the design, type the following
command at the simulator prompt:
s r
To see all the signals in the wave-default window, type the
following command at the simulator prompt:
w r
1
To simulate the design, type the following command at the
simulator prompt:
run 10000ns r
Configuration write operations on the command registers BAR0 and
BAR1 of the Altera PCI MegaCore function, followed by
configuration write operations on BAR0 and BAR1 of the PCI
testbench target device (trgt_tranx).
PCI Compiler Version 10.1
Not all of the signals show up in the Wave - Default
window. You need to explicitly add other signals of interest
to the Wave - Default window.
Altera Corporation
Chapter 8,
January 2011
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