IPR-QDRII/UNI Altera, IPR-QDRII/UNI Datasheet - Page 66
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IPR-QDRII/UNI
Manufacturer Part Number
IPR-QDRII/UNI
Description
IP CORE Renewal Of IP-QDRII/UNI
Manufacturer
Altera
Datasheet
1.IP-QDRIIUNI.pdf
(74 pages)
Specifications of IPR-QDRII/UNI
Software Application
IP CORE, Memory Controllers, SRAM
Supported Families
Arria II GX, HardCopy III, Stratix III, Stratix IV
Core Architecture
FPGA
Core Sub-architecture
Arria, HardCopy, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
7–4
External Memory Interface Handbook Volume 3
Section III. QDR II and QDR II+ SRAM Controller with UniPHY User Guide
Example Driver Add-Ons
Table 7–1. Driver Signals (Part 2 of 2)
Some optional components that can be useful for verifying aspects of the controller
and PHY operation are generated in conjunction with certain user-specified options.
These add-on components are self-contained, and are not part of the controller or
PHY, nor the example driver.
User Refresh Generator
The user refresh generator sends refresh requests to the memory controller when user
refresh is enabled. The memory controller returns an acknowledgement signal and
then issues the refresh command to the memory device.
The user refresh generator is created when you turn on Enable User Refresh under
Controller Settings on the General Settings tab of the parameter editor. The user
refresh generator is instantiated by example_top_v. and resides in the
example_project subdirectory.
Refresh Monitor
As its name implies, the refresh monitor monitors refresh commands from the
controller and verifies that those commands conform to the necessary refresh timing
parameters.
The refresh monitor is created when you turn on Enable User Refresh under
Controller Settings on the General Settings tab of the parameter editor. The refresh
monitor is instantiated by example_top_tb.v and resides in refresh_monitor.sv in the
rtl_sim subdirectory.
Data Corrupter
The data corrupter intercepts read data in the memory interface bus and introduces
errors to that data to test the error detection function in the memory controller. Both
the rate of error injection and the number of error bits are configurable (although the
per-byte parity protection feature supports only 1 bit error detection).
The data corrupter employs four types of error injection:
■
■
■
■
Throughout the four types of error injection tests, the data corrupter exercises a
walking-one pattern to confirm correctness.
pass
fail
test_complete
per-bit data corruption in a single memory burst
per-byte corruption in a single memory burst
per-bit all-burst corruption
per-byte all burst corruption
Signal
Width
pass
fail
test_complete
Signal Type
Chapter 7: Functional Description—Example Top-Level Project
December 2010 Altera Corporation
Example Driver