AD9516-5BCPZ-REEL7 Analog Devices Inc, AD9516-5BCPZ-REEL7 Datasheet - Page 4

• Manufacturer Part Number: AD9516-5BCPZ-REEL7
• Description: 10/14 Chan Clock IC W/PLL-no VCO
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9516-5BCPZ-REEL7

• Pll: Yes
• Input: CMOS, LVDS, LVPECL
• Output: CMOS, LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:14
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.4GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 2.4GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9516-5
SPECIFICATIONS
Typical (typ) is given for VS = VS_LVPECL = 3.3 V ± 5%; VS ≤ VCP ≤ 5.25 V; T
otherwise noted. Minimum (min) and maximum (max) values are given over full V
POWER SUPPLY REQUIREMENTS
Table 1.
Parameter
VS
VS_LVPECL
VCP
RSET Pin Resistor
CPRSET Pin Resistor
PLL CHARACTERISTICS
Table 2.
Parameter
REFERENCE INPUTS
PHASE/FREQUENCY DETECTOR (PFD)
CHARGE PUMP (CP)
PFD Input Frequency
Antibacklash Pulse Width
Differential Mode (REFIN, REFIN)
Dual Single-Ended Mode (REF1, REF2)
Input Capacitance
I
I
Sink-and-Source Current Matching
I
I
CP
CP
CP
CP
Input Frequency
Input Sensitivity
Self-Bias Voltage, REFIN
Self-Bias Voltage, REFIN
Input Resistance, REFIN
Input Resistance, REFIN
Input Frequency (AC-Coupled)
Input Frequency (DC-Coupled)
Input Sensitivity (AC-Coupled)
Input Logic High
Input Logic Low
Input Current
High Value
Low Value
Absolute Accuracy
CPRSET Range
Sink/Source
High Impedance Mode Leakage
vs. V
vs. Temperature
CP
Min
3.135
2.375
VS
Typ
3.3
4.12
5.1
Max
3.465
VS
5.25
Min
0
1.35
1.30
4.0
4.4
20
0
2.0
−100
Unit
V
V
V
kΩ
kΩ
Typ
250
1.60
1.50
4.8
5.3
0.8
2
1.3
2.9
6.0
4.8
0.60
2.5
2.7/10
1
2
1.5
2
Test Conditions/Comments
This is 3.3 V ± 5%
This is nominally 2.5 V to 3.3 V ± 5%
This is nominally 3.3 V to 5.0 V ± 5%
Sets internal biasing currents; connect to ground
Sets internal CP current range, nominally 4.8 mA (CP_lsb = 600 μA); actual
current can be calculated by: CP_lsb = 3.06/CPRSET; connect to ground
Rev. 0 | Page 4 of 76
Max
250
1.75
1.60
5.9
6.4
250
250
0.8
+100
100
45
Unit
MHz
mV p-p
V
V
kΩ
kΩ
MHz
MHz
V p-p
V
V
μA
pF
MHz
MHz
ns
ns
ns
mA
mA
%
kΩ
nA
%
%
%
S
A
and T
= 25°C; RSET = 4.12 kΩ; CPRSET = 5.1 kΩ, unless
Test Conditions/Comments
Differential mode (can accommodate single-ended
input by ac grounding undriven input)
Frequencies below about 1 MHz should be dc-coupled;
be careful to match V
PLL figure of merit increases with increasing slew rate;
see Figure 13
Self-bias voltage of REFIN
Self-bias voltage of REFIN
Self-biased
Self-biased
Two single-ended CMOS-compatible inputs
Slew rate > 50 V/μs
Slew rate > 50 V/μs; CMOS levels
Should not exceed V
Each pin, REFIN (REF1)/REFIN (REF2)
Antibacklash pulse width = 1.3 ns, 2.9 ns
Antibacklash pulse width = 6.0 ns
0x017[1:0] = 01b
0x017[1:0] = 00b; 0x017[1:0] = 11b
0x017[1:0] = 10b
Programmable
With CPRSET = 5.1 kΩ
V
0.5 < V
0.5 < V
V
CP
CP
A
= VCP/2
= VCP/2 V
(−40°C to +85°C) variation.
CP
CP
< VCP − 0.5 V
< VCP − 0.5 V
1
1
CM
S
p-p
(self-bias voltage)
1
1