ADUC836BSZ Analog Devices Inc, ADUC836BSZ Datasheet - Page 27

• Manufacturer Part Number: ADUC836BSZ
• Description: 16bit Dual ADC With Embedded 8 Bit MCU
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC836BSZ

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 12.58MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Size: 62KB (62K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.25 V
• Data Converters: A/D 7x16b; D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 52-MQFP, 52-PQFP
• Cpu Family: ADuC8xx
• Device Core: 8052
• Device Core Size: 8b
• Frequency (max): 12.58MHz
• Interface Type: I2C/SPI/UART
• Total Internal Ram Size: 2.25KB
• # I/os (max): 26
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 2(2-chx16-bit)
• On-chip Dac: 1-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 52
• Package Type: MQFP
• Package: 52MQFP
• Family Name: ADuC8xx
• Maximum Speed: 12.58 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 26
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Digital Filter
The output of the - modulator feeds directly into the digital
filter.The digital filter then band-limits the response to a frequency
significantly lower than one-half of the modulator frequency. In
this manner, the 1-bit output of the comparator is translated into
a band-limited, low noise output from the ADuC836 ADCs.
The ADuC836 filter is a low-pass, SIN
primary function is to remove the quantization noise introduced
at the modulator. The cutoff frequency and decimated output
data rate of the filter are programmable via the SF (Sinc Filter)
SFR, as described in Table VIII.
Figure 11 shows the frequency response of the ADC channel at
the default SF word of 69 dec or 45H, yielding an overall output
update rate of just under 20 Hz.
It should be noted that this frequency response allows frequency
components higher than the ADC Nyquist frequency to pass
through the ADC, in some cases without significant attenuation.
These components may, therefore, be aliased and appear in-band
after the sampling process.
It should also be noted that rejection of mains related frequency
components, i.e., 50 Hz and 60 Hz, is seen to be at a level of
>65 dB at 50 Hz and >100 dB at 60 Hz. This confirms the data
sheet specifications for 50 Hz/60 Hz Normal Mode Rejection
(NMR) at a 20 Hz update rate.
The response of the filter, however, will change with SF word, as
can be seen in Figure 12, which shows >90 dB NMR at 50 Hz
and >70 dB NMR at 60 Hz when SF = 255 dec.
REV. A
–100
–110
–120
–10
–20
–30
–40
–50
–60
–70
–80
–90
0
0
Figure 11. Filter Response, SF = 69 dec
10
20
30
40
FREQUENCY – Hz
50
60
3
70
or (SINx/x)3 filter whose
80
90
100 110
–27–
Figures 13 and 14 show the NMR for 50 Hz and 60 Hz across
the full range of SF word, i.e., SF = 13 dec to SF = 255 dec.
Figure 13. 50 Hz Normal Mode Rejection vs. SF
Figure 14. 60 Hz Normal Mode Rejection vs. SF
–100
–110
–120
–100
–110
–120
–100
–110
–120
–10
–20
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
0
0
0
10
10
0
Figure 12. Filter Response, SF = 255 dec
30
30
10
50
50
20
70
70
30
90
90
FREQUENCY – Hz
110
110
40
SF – Decimal
SF – Decimal
130
130
50
150 170 190 210
150 170 190 210
60
70
ADuC836
80
230 250
230 250
90
110