ADUC836BSZ Analog Devices Inc, ADUC836BSZ Datasheet - Page 48

• Manufacturer Part Number: ADUC836BSZ
• Description: 16bit Dual ADC With Embedded 8 Bit MCU
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC836BSZ

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 12.58MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Size: 62KB (62K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.25 V
• Data Converters: A/D 7x16b; D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 52-MQFP, 52-PQFP
• Cpu Family: ADuC8xx
• Device Core: 8052
• Device Core Size: 8b
• Frequency (max): 12.58MHz
• Interface Type: I2C/SPI/UART
• Total Internal Ram Size: 2.25KB
• # I/os (max): 26
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 2(2-chx16-bit)
• On-chip Dac: 1-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 52
• Package Type: MQFP
• Package: 52MQFP
• Family Name: ADuC8xx
• Maximum Speed: 12.58 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 26
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DUAL DATA POINTER
The ADuC836 incorporates both main and shadow data pointers.
The shadow data pointer is selected via the data pointer control
SFR (DPCON). DPCON also includes features such as automatic
hardware post-increment and post-decrement, as well as automatic
data pointer toggle. DPCON is described in Table XXIII.
Bit
7
6
5
4
3
2
1
0
NOTES
1. This is the only place where the main and shadow data pointers are distinguished. Everywhere else in this data sheet, wherever the DPTR is mentioned, operation on the
2. Only MOVC/MOVX @DPTR instructions are relevant above. MOVC/MOVX PC/@Ri instructions will not cause the DPTR to automatically post increment/decrement,
ADuC836
MOVELOOP:
active DPTR is implied.
and so on. To illustrate the operation of DPCON, the following code will copy 256 bytes of code memory at address D000H into XRAM starting from address 0000H.
the code uses 16 bytes and 2054 cycles. To perform this on a standard 8051 requires approximately 33 bytes and 7172 cycles (depending on how it is implemented).
MOV
MOV
MOV
CLR
Name
–––
DPT
DP1m1
DP1m0
DP0m1
DP0m0
–––
DPSEL
DPTR,#0
DPCON,#55h
DPTR,#0D000h
A
Description
Reserved for Future Use
Data Pointer Automatic Toggle Enable.
Cleared by user to disable auto swapping of the DPTR.
Set in user software to enable automatic toggling of the DPTR after each MOVX or MOVC instruction.
Shadow Data Pointer Mode.
These two bits enable extra modes of the shadow data pointer operation, allowing for more compact and more
efficient code size and execution.
m1
0
0
1
1
Main Data Pointer Mode.
These two bits enable extra modes of the main data pointer operation, allowing for more compact and more
efficient code size and execution.
m1
0
0
1
1
This bit is not implemented to allow the INC DPCON instruction to toggle the data pointer without incre-
menting the rest of the SFR.
Data Pointer Select.
Cleared by user to select the main data pointer.This means that the contents of the main 24-bit DPTR appears
in the three SFRs: DPL, DPH, and DPP.
Set by user to select the shadow data pointer. This means that the contents of the shadow 24-bit DPTR
appears in the three SFRs: DPL, DPH, and DPP.
; Main DPTR = 0
; Select shadow DPTR
; DPTR1 increment mode,
; DPTR0 increment mode
; DPTR auto toggling ON
; Shadow DPTR = D000h
m0
0
1
0
1
m0
0
1
0
1
Behavior of the Shadow Data Pointer
8052 Behavior
DPTR is post-incremented after a MOVX or MOVC instruction.
DPTR is post-decremented after a MOVX or MOVC instruction.
DPTR LSB is toggled after a MOVX or MOVC instruction.
(This instruction can be useful for moving 8-bit blocks to/from 16-bit devices.)
Behavior of the Main Data Pointer
8052 Behavior
DPTR is post-incremented after a MOVX or MOVC instruction.
DPTR is post-decremented after a MOVX or MOVC instruction.
DPTR LSB is toggled aftera MOVX or MOVC instruction.
(This instruction can be useful for moving 8-bit blocks to/from 16-bit devices.)
Table XXIII. DPCON SFR Bit Designations
–48–
DPCON
SFR Address
Power-On Default Value
Bit Addressable
MOVC A,@A+DPTR
MOVX @DPTR,A
MOV
JNZ
A, DPL
MOVELOOP
Data Pointer Control SFR
A7H
00H
No
; Get data
; Post Inc DPTR
; Swap to Main DPTR (Data)
; Put ACC in XRAM
; Increment main DPTR
; Swap to Shad DPTR (Code)
REV. A