DS33Z11 Maxim Integrated Products, DS33Z11 Datasheet - Page 114

• Manufacturer Part Number: DS33Z11
• Description: Network Controller & Processor ICs Ethernet Mapper Ethe rnet-Serial TDM Ethe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z11

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.6 Ethernet Interface Registers
The Ethernet Interface registers are used to configure RMII/MII bus operation and establish the MAC parameters
as required by the user. The MAC Registers cannot be addressed directly from the Processor port. The registers
below are used to perform indirect read or write operations to the MAC registers. The MAC Status Registers are
shown in
9.6.1 Ethernet Interface Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Bits 0 – 7: MAC Read Address (MACRA0-7) Low byte of the MAC address. Used only for read operations.
Register Name:
Register Description:
Register Address:
Bit #
Name
Bits 0 – 7: MAC Read Address (MACRA8-15) High byte of the MAC address. Used only for read operations.
Register Name:
Register Description:
Register Address:
Bit #
Name
Bits 0 – 7: MAC Read Data 0 (MACRD0-7) One of four bytes of data read from the MAC. Valid after a read
command has been issued and the SU.MACRWC.MCS bit is zero.
Table
MACRA7
MACRA1
MACRD7
9-7. Accessing the MAC Registers is described in the Section 8.14.
7
0
7
5
0
7
0
MACRD6
MACRA6
MACRA1
6
0
4
0
6
0
6
SU.MACRADL
MAC Read Address Low Register
140h
SU.MACRADH
MAC Read Address High Register
141h
SU.MACRD0
MAC Read Data Byte 0
142h
MACRA5
MACRD5
MACRA1
5
0
5
0
5
3
0
MACRD4
MACRA4
MACRA1
114 of 172
4
0
4
0
4
2
0
MACRD3
MACRA3
MACRA1
3
0
3
0
3
1
0
MACRA2
MACRD2
MACRA1
2
0
2
0
2
0
0
MACRD1
MACRA1
MACRA9
1
0
1
0
1
0
MACRA0
MACRD0
MACRA8
0
0
0
0
0
0