DS33Z11 Maxim Integrated Products, DS33Z11 Datasheet - Page 117

• Manufacturer Part Number: DS33Z11
• Description: Network Controller & Processor ICs Ethernet Mapper Ethe rnet-Serial TDM Ethe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z11

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Bits 0 – 7: MAC Write Address (MACAW8-15) High byte of the MAC address. Used only for write operations.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 1: MAC Command RW (MCRW) If this bit is written to 1, a read is performed from the MAC. If this bit is
written to 0, a write operation is performed. Address information for write operations must be located in
SU.MACAWH and SU.MACAWL. Address information for read operations must be located in SU.MACRADH and
SU.MACRADL. The user must also write a 1 to the MCS bit, and the DS33Z11 will clear MCS when the operation
is complete.
Bit 0: MAC Command Status (MCS) Setting MCS in conjunction with MCRW will initiate a read or write to the
MAC registers. Upon completion of the read or write this bit is cleared. Once a read or write command has been
initiated the host must poll this bit to see when the operation is complete.
MACAW
15
7
0
7
0
-
MACAW
14
6
0
6
0
-
SU.MACAWH
MAC Address Write High
14Bh
SU.MACRWC
MAC Read Write Command Status
14Ch
MACAW
13
5
0
5
0
-
MACAW1
117 of 172
4
2
0
4
0
-
MACAW1
3
1
0
3
0
-
MACAW1
2
0
0
2
0
-
MACAW9
MCRW
1
0
1
0
MACAW8
MCS
0
0
0
0