LAN91C100FD-ST SMSC, LAN91C100FD-ST Datasheet - Page 19

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LAN91C100FD-ST

Manufacturer Part Number
LAN91C100FD-ST
Description
Ethernet ICs Non-PCI 10/100 Ethernet MAC
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN91C100FD-ST

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 MB, 100 MB
Supply Voltage (max)
7 V
Supply Voltage (min)
0.3 V
Supply Current (max)
40 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 5
5.1
SMSC LAN91C100FD Rev. D
FEAST Fast Ethernet Controller with Full Duplex Capability
Packet Format in Buffer Memory
The packet format in memory is similar for the Transmit and Receive areas. The first word is reserved for
the status word. The next word is used to specify the total number of bytes, and it is followed by the data
area. The data area holds the packet itself.
BYTE COUNT - Divided by two, it defines the total number of words including the STATUS WORD, the
BYTE COUNT WORD, the DATA AREA and the CONTROL BYTE.
The receive byte count always appears as even; the ODDFRM bit of the receive status word indicates if the
low byte of the last word is relevant.
CONTROL BYTE
STATUS WORD
BYTE COUNT
DATA AREA
RAM OFFSET
2046 max
(decimal)
0
2
4
Data Structures and Registers
~~
~~
bit15
CONTROL BYTE
reserved
STATUS
Figure 5.1 - Data Packet Format
Written by CSMA upon transmit
completion (see Status Register)
Written by CPU to control
odd/even data bytes
Written by CPU
Written/modified by CPU
TRANSMIT PACKET
DATASHEET
Page 19
DATA AREA
BYTE
LAST DATA BYTE if odd
Written by CSMA upon receive
completion (see RX Frame
Status Word)
Written by CSMA
Written by CSMA
Written by CSMA; also has
odd/even bit
COUNT
WORD
bit0
RECEIVE PACKET
~~
~~
Revision 1.0 (09-22-08)

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