LAN91C100FD-ST SMSC, LAN91C100FD-ST Datasheet - Page 53

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LAN91C100FD-ST

Manufacturer Part Number
LAN91C100FD-ST
Description
Ethernet ICs Non-PCI 10/100 Ethernet MAC
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN91C100FD-ST

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 MB, 100 MB
Supply Voltage (max)
7 V
Supply Voltage (min)
0.3 V
Supply Current (max)
40 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Note:
SMSC LAN91C100FD Rev. D
FEAST Fast Ethernet Controller with Full Duplex Capability
If no EEPROM is connected to the LAN91C100FD, for example for some embedded applications, the
ENEEP pin should be grounded and no accesses to the EEPROM will be attempted. Configuration, Base,
and Individual Address assume their default values upon hardware reset and the CPU is responsible for
programming them for their final value.
On EEPROM write operations (after setting the STORE bit) the value of the GENERAL PURPOSE
REGISTER is written at the EEPROM word address defined by the POINTER REGISTER 6 least
significant bits.
RELOAD and STORE are set by the user to initiate read and write operations respectively. Polling the
value until read low is used to determine completion. When an EEPROM access is in progress the
STORE and RELOAD bits of CTR will readback as both bits high. No other bits of the LAN91C100FD
can be read or written until the EEPROM operation completes and both bits are clear.
mechanism is also valid for reset initiated reloads.
DATASHEET
Page 53
Revision 1.0 (09-22-08)
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