LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 193

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
BITS
11:0
12
GPIO 8 Clock Event Polarity (GPIO_EVENT_POL_8)
This bit determines if the 1588 clock event output on GPIO 8 is active high
or low.
0: 1588 clock event output active low
1: 1588 clock event output active high
GPIO Buffer Type 11-0 (GPIOBUF[11:0])
This field sets the buffer types of the 12 GPIO pins.
0: Corresponding GPIO pin configured as an open-drain driver
1: Corresponding GPIO pin configured as a push/pull driver
As an open-drain driver, the output pin is driven low when the corresponding
data register is cleared, and is not driven when the corresponding data
register is set.
As an open-drain driver used for 1588 Clock Events, the corresponding
GPIO_EVENT_POL_8 and GPIO_EVENT_POL_9 bits determine when the
corresponding pin is driven per the following table:
GPIOx Clock Event Polarity
0
0
1
1
DESCRIPTION
1588 Clock Event
yes
yes
DATASHEET
no
no
193
driven low
driven low
not driven
not driven
Pin State
TYPE
R/W
R/W
Revision 1.7 (06-29-10)
DEFAULT
1b
0h