LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 413
LAN9312-NZW
Manufacturer Part Number
LAN9312-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9312-NZW.pdf
(458 pages)
Specifications of LAN9312-NZW
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.5.4.4
31:16
BITS
15:8
7:0
RESERVED
Resume Level Low
These bits specify the buffer usage level during times when 2 or 3 ports are
active.
Each buffer is 128 bytes.
Note:
Resume Level High
These bits specify the buffer usage level during times when 0 or 1 ports are
active.
Each buffer is 128 bytes.
Note:
Buffer Manager Flow Control Resume Level Register (BM_FC_RESUME_LVL)
This register configures the buffer usage level when a Pause frame with a pause value of 1 is sent.
A port is “active” when 36 buffers are in use for that port.
A port is “active” when 36 buffers are in use for that port.
Register #:
1C03h
DESCRIPTION
DATASHEET
413
Size:
32 bits
TYPE
R/W
R/W
RO
Revision 1.7 (06-29-10)
DEFAULT
03h
07h
-
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