LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 276
LAN9312-NZW
Manufacturer Part Number
LAN9312-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9312-NZW.pdf
(458 pages)
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.3.5
Host MAC Multicast Hash Table Low Register (HMAC_HASHL)
Offset:
5h
Size:
32 bits
This read/write register defines the lower 32-bits of the Multicast Hash Table. Please refer to the
Host
MAC Multicast Hash Table High Register (HMAC_HASHH)
and
Section 9.4, "Address Filtering"
for
more information.
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
Lower 32-bits of the 64-bit Hash Table
R/W
00000000h
Revision 1.7 (06-29-10)
276
SMSC LAN9312
DATASHEET
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