LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 380

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Revision 1.7 (06-29-10)
14.5.3.13
BITS
31:3
2:0
RESERVED
DIFFSERV Priority
These bits specify the assigned receive priority for IP packets with a ToS/CS
field that matches this index.
Switch Engine DIFFSERV Table Write Data Register (SWE_DIFFSERV_TBL_WR_DATA)
This register is used to write the DIFFSERV table. The DIFFSERV table is not initialized upon reset
on power-up. If DIFFSERV is enabled, the full table should be initialized by the host.
Register #:
1812h
DESCRIPTION
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
380
Size:
32 bits
TYPE
R/W
RO
SMSC LAN9312
DEFAULT
000b
Datasheet
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