LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 367
LAN9312-NZW
Manufacturer Part Number
LAN9312-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9312-NZW.pdf
(458 pages)
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.5.3.2
BITS
31:0
MAC Address
This field contains the first 32 bits of the ALR entry that will be written into
the ALR table. These bits correspond to the first 32 bits of the MAC address.
Bit 0 holds the LSB of the first byte (the multicast bit).
Switch Engine ALR Write Data 0 Register (SWE_ALR_WR_DAT_0)
This register is used in conjunction with the
(SWE_ALR_WR_DAT_1)
Entry command in the
Register #:
Switch Engine ALR Command Register
and contains the first 32 bits of ALR data to be manually written via the Make
1801h
DESCRIPTION
DATASHEET
367
Size:
Switch Engine ALR Write Data 1 Register
32 bits
(SWE_ALR_CMD).
TYPE
R/W
Revision 1.7 (06-29-10)
00000000h
DEFAULT
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