LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 384
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LAN9312-NZW
Manufacturer Part Number
LAN9312-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9312-NZW.pdf
(458 pages)
Specifications of LAN9312-NZW
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Revision 1.7 (06-29-10)
14.5.3.17
BITS
31:6
5:3
2:0
RESERVED
Enable Learning on Ingress
When set, source addresses are learned when a packet is received on the
corresponding port and the corresponding Port State in the
Port State Register (SWE_PORT_STATE)
There is one enable bit per ingress port. Bits 5,4,3 correspond to switch
ports 2,1,0 respectively.
Enable Membership Checking
When set, VLAN membership is checked when a packet is received on the
corresponding port.
The packet will be filtered if the ingress port is not a member of the VLAN
(unless the Admit Non Member bit is set for the port in the
Admit Non Member Register
For destination addresses that are found in the ALR table, the packet will be
filtered if the egress port is not a member of the VLAN (for destination
addresses that are not found in the ALR table only the ingress port is
checked for membership).
The VLAN Enable bit in the
Register (SWE_GLOBAL_INGRSS_CFG)
have an affect.
There is one enable bit per ingress port. Bits 2,1,0 correspond to switch
ports 2,1,0 respectively.
Switch Engine Port Ingress Configuration Register (SWE_PORT_INGRSS_CFG)
This register is used to configure the per port ingress rules.
Register #:
Switch Engine Global Ingress Configuration
(SWE_ADMT_N_MEMBER))
1841h
DESCRIPTION
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
needs to be set for these bits to
is set to forwarding or learning.
384
Size:
Switch Engine
Switch Engine
32 bits
TYPE
R/W
R/W
RO
SMSC LAN9312
DEFAULT
000b
111b
Datasheet
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