PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 345

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
Receive Byte Count Register 2 (Read)
Value after reset: 00
RBC2
OV2
RBC2(6:0)
Receive Byte Count Register 3 (Read)
Value after reset: 00
RBC3
OV3
RBC3(6:0)
Signaling Status Register 2 (Read)
Value after reset: 00
SIS2
XDOV2
Data Sheet
XDOV2
OV2
OV3
7
7
7
Counter Overflow - HDLC Channel 2
0 =
1 =
Receive Byte Count - HDLC Channel 2
Indicates the length of a received frame.
Counter Overflow - HDLC Channel 3
0 =
1 =
Receive Byte Count - HDLC Channel 3
Indicates the length of a received frame.
Transmit Data Overflow - HDLC Channel 2
More than 32 bytes have been written to the XFIFO2.
This bit is reset
RBC26
RBC36
XFW2
•by a transmitter reset command XRES or
•when all bytes in the accessible half of the XFIFO2 have been
H
H
H
moved in the inaccessible half.
Less than or equal to 128 bytes received
More than 128 bytes received
Less than or equal to 128 bytes received
More than 128 bytes received
RBC25
RBC35
XREP2
RBC24
RBC34
345
RBC23
RBC33
RLI2
RBC22
RBC32
CEC2
RBC21
RBC31
Rev. 1.1, 2005-06-13
RBC20
RBC30
PEF 2256 H/E
E1 Registers
0
0
0
FALC
(A9)
(90)
(91)
®
56

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