PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 405

• Manufacturer Part Number: PEF2256EV22NP
• Manufacturer: Lantiq

Specifications of PEF2256EV22NP

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Supplier Unconfirmed

DXSS
Clock Mode Register 2 (Read/Write)
Value after reset: 00
CMR2
ECFAX
ECFAR
DCOXC
Data Sheet
EXFAX
7
ECFAR DCOXC
DCO-X Synchronization Clock Source
0 =
1 =
Enable Corner Frequency Adjustment for DCO-X
0 =
1 =
Note:DCO-X must be enabled.
Enable Corner Frequency Adjustment for DCO-R
0 =
1 =
Note:DCO-R must be enabled.
DCO-X Center-Frequency Enable
0 =
1 =
H
The DCO-X circuitry synchronizes to the internal reference
clock which is sourced by SCLKX/R or RCLK. Since there are
many reference clock opportunities the following internal
prioritizing in descending order from left to right is realized:
LIM1.RL > CMR1.DXSS > LIM2.ELT > current working clock of
transmit system interface.
If one of these bits is set the corresponding reference clock is
taken.
DCO-X synchronizes to an external reference clock provided
on pin XP(A to D) pin function TCLK, if no remote loop is active.
TCLK is selected by PC(4:1).XPC(3:0) = 0011
Corner frequency adjustment is disabled.
Corner
programmed in CMR3.CFAX (see page 409).
Corner frequency adjustment is disabled.
Corner
programmed in CMR3.CFAR. LIM2.SCF is ignored (see page
409).
The center function of the DCO-X circuitry is disabled.
The center function of the DCO-X circuitry is enabled.
DCO-X centers to 1.544 MHz related to the master clock
reference (MCLK), if reference clock (e.g. SCLKX) is missing.
frequency
frequency
DCF
405
IRSP
adjustment
adjustment
IRSC
is
is
IXSP
enabled,
enabled,
Rev. 1.1, 2005-06-13
T1/J1 Registers
B
PEF 2256 H/E
IXSC
0
values
values
FALC
(45)
®
are
are
56