XC3SD3400A-4FGG676C Xilinx Inc, XC3SD3400A-4FGG676C Datasheet - Page 90

• Manufacturer Part Number: XC3SD3400A-4FGG676C
• Description: FPGA, SPARTAN-3A, DSP, 676FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A DSPr

Specifications of XC3SD3400A-4FGG676C

• No. Of Logic Blocks: 5968
• No. Of Gates: 3400000
• No. Of Macrocells: 53712
• Family Type: Spartan-3A
• No. Of Speed Grades: 4
• Total Ram Bits: 2322432
• No. Of I/o's: 502
• Clock Management: DCM
• I/o Supply: RoHS Compliant
• Number Of Logic Elements/cells: 53712
• Number Of Labs/clbs: 5968
• Number Of I /o: 469
• Number Of Gates: 3400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 676-BBGA
• Package: 676FBGA
• Family Name: Spartan®-3A
• Device Logic Units: 53712
• Device System Gates: 3400000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 469
• Ram Bits: 2322432
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 122-1532 - KIT DEVELOPMENT SPARTAN 3ADSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1539

Table 68: Spartan-3A DSP FG676 Pinout for
XC3SD3400A FPGA (Cont’d)
DS610 (v3.0) October 4, 2010
Product Specification
Bank
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
IP_1/VREF_1
IO_L58P_1/VREF_1
IO_L56N_1
IO_L54N_1
IO_L54P_1
IO_L56P_1
IO_L60P_1
IO_L61N_1
IO_L61P_1
IO_L60N_1
IO_L63N_1/A23
IO_L63P_1/A22
IP_1/VREF_1
IO_L02P_1/LDC1
IO_L02N_1/LDC0
IO_L05P_1
IO_L03P_1/A0
IO_L03N_1/A1
IO_L05N_1
IO_L06P_1
IO_L07P_1
IO_L07N_1/VREF_1
IO_L06N_1
IO_L09P_1
IO_L09N_1
IO_L11P_1
IO_L11N_1
VCCO_1
VCCO_1
VCCO_1
VCCO_1
VCCO_1
VCCO_1
VCCO_1
VCCO_1
VCCO_1
VCCO_1
IO_L02P_2/M2
IO_L05N_2
XC3SD3400A Pin Name
FG676
AE26
AD25
AD26
AC23
AC24
AC25
AC26
AB23
AB24
AB26
AA22
AA23
AA24
AA25
AB25
W22
Ball
G25
F23
F24
F25
E24
E26
D24
D25
D26
C25
C26
B26
T19
T25
N22
H22
H25
E25
F22
L19
L25
Y7
Y9
VREF
VREF
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DUAL
DUAL
VREF
DUAL
DUAL
I/O
DUAL
DUAL
I/O
I/O
I/O
VREF
I/O
I/O
I/O
I/O
I/O
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
DUAL
I/O
Type
www.xilinx.com
Table 68: Spartan-3A DSP FG676 Pinout for
XC3SD3400A FPGA (Cont’d)
Bank
Spartan-3A DSP FPGA Family: Pinout Descriptions
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
IO_L12P_2
IO_L17P_2/RDWR_B
IO_L25N_2/GCLK13
IO_L27P_2/GCLK0
IO_L34N_2/D3
IP_2/VREF_2
IO_L43N_2
IO_L05P_2
IO_L09N_2
IO_L16N_2
IO_L20N_2
IO_L31N_2
IO_L46P_2
IO_L09P_2
IO_L13P_2
IO_L16P_2
IO_L20P_2
IO_L31P_2
IO_L35P_2
IO_L42P_2
IO_L46N_2
IO_L13N_2
IO_L35N_2
IO_L42N_2
IO_L06N_2
IO_L07N_2
IO_L10P_2
IO_L18N_2
IO_L19N_2/VS0
IO_L22N_2/D6
IO_L24P_2/D5
IO_L26P_2/GCLK14
IO_L28P_2/GCLK2
IP_2/VREF_2
IP_2/VREF_2
IO_L36P_2/D2
IO_L37P_2
IO_L39P_2
IP_2/VREF_2
XC3SD3400A Pin Name
FG676
AF10
AF12
AF13
AF14
AF15
AF17
AF18
AF19
AF20
AF22
W10
W12
W13
W15
W17
Ball
Y10
Y12
Y13
Y14
Y15
Y16
Y17
V10
V11
V12
V13
V14
V15
V16
V17
U11
U15
U16
AF3
AF4
AF5
AF8
AF9
W9
I/O
DUAL
GCLK
GCLK
DUAL
VREF
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DUAL
DUAL
DUAL
GCLK
GCLK
VREF
VREF
DUAL
I/O
I/O
VREF
Type
90