LH7A400N0F000B5 NXP Semiconductors, LH7A400N0F000B5 Datasheet - Page 26

• Manufacturer Part Number: LH7A400N0F000B5
• Manufacturer: NXP Semiconductors

Specifications of LH7A400N0F000B5

• Lead Free Status / RoHS Status: Compliant

LH7A400
Direct Memory Access Controller (DMA)
lowing three peripherals to the system memory:
• USB (1 Tx and 1 Rx DMA Channel)
• MMC (1 Tx and 1 Rx DMA Channel)
• AC97 (3 Tx and 3 Rx DMA Channels).
capable of transferring data in both directions simulta-
neously. All memory transfers take place via the main
system AHB bus.
• Independent DMA channels for Tx and Rx
• Two Buffer Descriptors per channel to avoid poten-
• No Buffer wrapping
• Buffer size may be equal to, greater than, or less
• Maskable interrupt generation
• Internal arbitration between DMA Channels and
• For DMA Data transfer sizes, byte, word and quad-
the system processor for setting up DMA operations
and monitoring their status. A system interrupt is gen-
erated when any or all of the DMA channels wish to
inform the processor that a new buffer needs to be allo-
cated. The DMA controller services three peripherals
using ten DMA channels, each with its own peripheral
DMA bus capable of transferring data in both directions
simultaneously.
channels, one for transmit and one for receive. The
AC97 peripheral uses six DMA channels (three trans-
mit and three receive) to allow different sample fre-
quency data queues to be handled with low software
overheads. The DMA Controller does not support
memory to memory transfers.
USB Device
• Fully compliant to USB 1.1 specification
• Provides a high level interface that shields the firm-
• Compatible with both OpenHCI and Intel’s UHCI
• Supports full-speed (12 Mbps) functions
• Supports Suspend and Resume signalling.
26
tial data under/over-flows due to software introduced
latency
than the packet size. Transfers can automatically
switch between buffers.
external bus arbiter.
word data transfers are supported.
ware from USB protocol details
standards
The DMA Controller interfaces streams from the fol-
Each has its own bi-directional peripheral DMA bus
DMA Specific features are:
A set of control and status registers are available to
The MMC and USB peripherals each use two DMA
The features of the USB are:
Rev. 01 — 16 July 2007
NXP Semiconductors
Color LCD Controller
support up to 1,024 × 768, 16-bit color LCD panels. It
interfaces directly to STN, color STN, TFT, AD-TFT,
and HR-TFT panels. Unlike other LCD controllers, the
LH7A400’s LCD Controller incorporates the timing con-
version logic from TFT to HR- and AD-TFT, allowing a
direct interface to these panels and minimizing external
chip count.
• Up to 1,024 × 768 Resolution
• 16-bit Video Bus
• STN, Color STN, AD-TFT, HR-TFT, TFT panels
• Single and Dual Scan STN panels
• Up to 15 Gray Shades
• Up to 64,000 Colors
AC97 Advanced Audio Codec Interface
includes a 5-pin serial interface to an external audio
codec. The AC97 LINK is a bi-directional, fixed rate,
serial Pulse Code Modulation (PCM) digital stream,
dividing each audio frame into 12 outgoing and 12
incoming data streams (slots), each with 20-bit sample
resolution.
AC97 link to the Audio Codec and an interface to the
AMBA APB.
• Serial-to-parallel conversion for data received from
• Parallel-to-serial conversion for data transmitted to
• Reception/Transmission of control and status infor-
• Supports up to 4 different codec sampling rates at a
the external codec
the external codec
mation via the AMBA APB interface
time with its 4 transmit and 4 receive channels. The
transmit and receive paths are buffered with internal
FIFO memories, allowing data to be stored indepen-
dently in both transmit and receive modes. The out-
going data for the FIFOs can be written via either the
APB interface or with DMA channels 1 - 3.
The LH7A400’s LCD Controller is programmable to
The Color LCD Controller features support for:
The AC97 Advanced Audio Codec controller
The AC97 controller contains logic that controls the
Its main features include:
32-Bit System-on-Chip
Preliminary data sheet