ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 183

• Manufacturer Part Number: ML610Q409-NNNTBZ03A7
• Description: MCU 8BIT 16K FLASH 4CH 100-TQFP
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of ML610Q409-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.25 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 100-TFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 12 Synchronous Serial Port
12.3.2 Receive Operation
Figure 12-7 Receive Operation Waveforms of Synchronous Serial Port for Clock Type 0 (Negative Logic)
Figure 12-6 Receive Operation Waveforms of Synchronous Serial Port for Clock Type 0 (Positive Logic)
When “0” is written to the SnMD1 bit and “1” is written to the SnMD0 bit of the serial port mode register (SIOnMOD0),
this LSI is set to a receive mode.
When the SnEN bit of the serial port control register (SIOnCON) is set to “1”, reception starts. When reception of
8/16-bit data terminates, a synchronous serial port interrupt (SIOnINT) occurs and the SnEN bit is set to “0”.
The received data is input from the tertiary function pins (P40/SIN0 or P44/SIN0) or the tertiary function pin (P50/SIN1,
P54SIN１) of GPIO.
When an internal clock is selected in the serial port mode register (SIOnMOD1), the LSI is set to a master mode and
when an external clock (SCKn) is selected, the LSI is set to a slave mode.
The serial port mode register (SIOnMOD0) enables selection of MSB first/LSB first.
The received data input pin (SINn) and the transfer clock input/output pin (SCKn) need to be set to the tertiary function
for the Port 4 or to the secondary function for the Port 5.
The receive operation waveforms of the synchronous serial port (8-bit length, MSB first) are shown in Figures 12-6 to
12-9, for the clock type 0 (positive logic), clock type 0 (negative logic), clock type 1 (positive logic), and clock type 1
(negative logic), respectively.
Shift register
Shift register
SIOnRCH,L
SIOnRCH,L
SIOnINT
SIOnINT
SnEN
SCKn
SnEN
SCKn
SINn
SINn
7
7
7
7
6
6
6
6
(8-bit length, MSB first)
(8-bit length, MSB first)
5
5
5
5
4
4
12-12
4
4
3
3
3
3
2
2
2
2
1
1
1
1
0
0
Received data
Received data
0
0