ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 314

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ML610Q409-NNNTBZ03A7

Manufacturer Part Number
ML610Q409-NNNTBZ03A7
Description
MCU 8BIT 16K FLASH 4CH 100-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q409-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
2MHz
Connectivity
SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.25 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q409-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
Chapter 22 LCD Drivers
A) When not using Programmable display allocation function (DASN bit of DSPMOD1 register is “0”)
B) When using Programmable display allocation function (DASN bit of DSPMOD1 register is “1”)
Suitable for the dot matrix type LCD panel whose common/segment array is approximated to the bit array of the display
register.
Figure 22-2 shows an example of the correlation between the display registers and the dot matrix type LCD image.
The programmable display allocation function is suitable for the LCD panel of segment type or character type whose
common/segment array is restricted by the design or wiring. The display allocation registers A and B can be used to
programmatically specify the display register bit-by-bit. This allows the display registers to be arrayed flexibly and thus
makes the display processing in the software easier. The content of the display allocation register A (DSmCn) specifies
the addresses of the display registers (DSPR00 to 27) to be output to the common "n" of the segment "m." The content
of the display allocation register B (DSmCnB) specifies the bits of the display registers (DSPR00 to 27) to be output to
the common "n" of the segment "m."
Figure 22-3 shows an example of the correlation between the display registers and the dot matrix type LCD image when
the programmable display allocation is used.
DSPR27
DSPR26
DSPR04
DSPR02
DSPR01
DSPR00
Unused
Figure 22-2 Example of Correlation between Display Registers and Dot Matrix Type LCD Image
Figure 22-3 An example of correlation between display registers and segment type LCD
DSPR27
DSPR26
DSPR4
DSPR3
DSPR2
DSPR1
DSPR0
4H 4G 4F 4E 4D 4C 4B 4A
2H 2G 2F 2E 2D 2C 2B 2A
1H 1G 1F 1E 1D 1C 1B 1A
0H 0G 0F 0E 0D 0C 0B 0A
b
7
i
t
b
6
t
i
Display
registers
b
5
t
i
b
7
i
t
Display
registers
b
4
i
t
b
6
t
i
b
3
i
t
b
5
t
i
b
4
t
i
b
2
t
i
b
3
i
t
b
1
i
t
b
2
i
t
b
0
i
t
b
1
i
t
DSPR4
DSPR0
DSPR0
DSPR0
DSPR
b
0
t
i
Programmabl
e display
allocation
Fixed
bit
display allocation
6
2
1
0
COM4
COM3
COM1
COM0
22-2
39
G
S
E
4E
Symbol on panel
4F
4D
S
E
G
7
4G
4G
0C
0B
0A
4A
4H
4C
G
4B
S
E
6
2E
2F
SEG39
SEG38
SEG4
SEG3
SEG2
SEG1
SEG0
2D
S
E
G
5
Dot Matrix LCD
2G
2A
C
O
M
4
2H
2C
C
O
M
3
2B
1E
G
S
E
4
COM
1F
C
O
M
2
1
3
4
4
C
O
M
1
1D
1G
C
O
M
0
1A
S
E
G
3
1H
1C
1B
0E
0F
S
E
G
2
SEG
0D
7
..
0
0
1
0G
0A
S
E
G
1
0H
0C
0B
S
E
G
0

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