ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 85

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ML610Q409-NNNTBZ03A7

Manufacturer Part Number
ML610Q409-NNNTBZ03A7
Description
MCU 8BIT 16K FLASH 4CH 100-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q409-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
2MHz
Connectivity
SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.25 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q409-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
ML610Q407/ML610Q408/ML610Q409 User's Manual
Chapter 5 Interrupt
5.3.5
Even if the interrupt conditions are satisfied, an interrupt may not be accepted depending on the operating state. This is
called an interrupt disabled state. See below for the interrupt disabled state and the handling of interrupts in this state.
For the DSR prefix instruction, see “nX-U8/100 Core Instruction Manual”.
Interrupt disabled state 1:Between the interrupt shift cycle and the instruction at the beginning of the interrupt routine
Interrupt disabled state 2:Between the DSR prefix instruction and the next instruction
Interrupt Disable State
When the interrupt conditions are satisfied in this section, an interrupt is generated immediately following the
execution of the instruction at the beginning of the interrupt routine corresponding to the interrupt that has already
been enabled.
When the interrupt conditions are satisfied in this section, an interrupt is generated immediately after execution of
the instruction following the DSR prefix instruction.
5-24

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