ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 265

• Manufacturer Part Number: ML610Q409-NNNTBZ03A7
• Description: MCU 8BIT 16K FLASH 4CH 100-TQFP
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of ML610Q409-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.25 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 100-TFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 18 Port 5
18.3 Description of Operation
18.3.1 Input/Output Port Functions
18.3.2 Secondary and Tertiary Functions
18.3.3 External Interrupt
For each pin of Port 5, either output or input is selected by setting the Port 5 direction register (P5DIR).
In the output mode, set the Port 5 control register 0 (P5CON0) to select either N-channel open drain output mode or
CMOS output mode.
In the input mode, set the Port 5 control registers 0 and 1 (P5CON0 and P5CON1) to select any of high-impedance input
mode, input mode with a pull-down resistor, or input mode with a pull-up resistor.
At the system reset, N-channel open drain output mode is selected as the initial state.
In output mode, the "L" or "H" level is output to each pin of Port 5 depending on the value set by the Port 5 data register
(P5D).
In input mode, the input level of each pin of Port 5 is read from the Port 5 data register (P5D).
The Port 5 is assigned with the pins for Melody 0 (MD0) output as the secondary function and the pins for Synchronous
serial port 1 (SIN1, SCK1, SOUT1) as the tertiary function. Each of them can be used as the secondary or tertiary
function by setting the P57MD1 to P50MD1 and P57MD0 to P50MD0 bits of the port mode register 1(P5MOD1) and 0
(P5MOD0).
Each of the Port 5 pins (P50 to P57) can be used as the external 8 interrupt (P5INT). Each interrupt is maskable and
selectable to be disabled or enabled. For details of interrupts, see Chapter 5, “Interrupts”.
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