ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 302

• Manufacturer Part Number: ML610Q409-NNNTBZ03A7
• Description: MCU 8BIT 16K FLASH 4CH 100-TQFP
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of ML610Q409-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.25 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 100-TFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 21 RC Oscillation Type A/D Converter
CR oscillator circuit
(2) Operation in Counter B reference mode
Figure 21-7 shows the operation timing in Counter B reference mode.
Following is an example of operation procedure in Counter B reference mode:
When the RARUN bit is set to “1” and the RCON signal (signal synchronized with the fall of the base clock) is set to”1”,
the RC oscillator circuit starts operation and Counter B starts counting of the RC oscillator clock (RCCLK). When
Counter B overflows, the RARUN bit is automatically reset ( ) and conversion operation terminates. At the same time,
an RC-ADC interrupt request (RADINT) occurs. ( )
When the RCON signal is set to “1”, Counter A starts counting of the base clock (BSCLK). When the RARUN bit is
reset due to overflow of Counter B, Counter A stops counting.
The final count “nA1” of Counter A is the CLK count value during the gate time “nB1 x t
following expression:
Input waveform
Preset to Counter B (RADCB1 and RADCB0) the value obtained by subtracting the count value “nB1” from the
maximum value + 1 (10000H). The product of the count value “nB1” and the RCCLK clock cycle indicates the gate
time.
Preset “0000H” to Counter A (RADCA1 and RADCA0).
Set the OM3–OM0 bits of RADMOD to desired oscillation mode. (See Table 21-1.)
Set the RADI bit of RADMOD to “1” to specify generating of an interrupt request signal by Counter B overflow.
Set the RARUN bit of RADCON to “1” to start A/D conversion.
Counter A
Counter B
nA1
RADINT
RARUN
BSCLK
IN0/IN1
RCCLK
RCON
≅
(10000H – nA0)
Figure 21-6 Operation Timing in Counter A Reference Mode
0000H
nB1•
t
BSCLK
t
RCCLK
t
t
RCCLK
BSCLK
(+1)
0001H
(+2)
∝
nA0: Reference count value
nB0: Measurement count value
0002H
f
RCCLK
nA0·t
(+3)
1
nB0·t
21-12
Gate time
BSCLK
RCCLK
0FFFCH
0FFFDH
nB0 – 2
0FF FEH
nB0 – 1
0FFFFH
RCCLK
(Interrupt request)
nB0
” and is expressed by the
Overflow
0000H