ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 262

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ML610Q409-NNNTBZ03A7

Manufacturer Part Number
ML610Q409-NNNTBZ03A7
Description
MCU 8BIT 16K FLASH 4CH 100-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q409-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
2MHz
Connectivity
SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.25 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q409-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
18.2.5 Port 5 Mode Register 0 and 1 (P5MOD0 and P5MOD1)
Address: 0F22CH
Access: R/W
Access size: 8/16-bit
Initial value: 00H
Address: 0F22DH
Access: R/W
Access size: 8-bit
Initial value: 00H
P5MOD0 and P5MOD1 are special function registers (SFRs) to select the primary function or the secondary function of
Port 5.
[Description of Bits]
Initial value
Initial value
P5MOD0
P5MOD1
R/W
R/W
P56MD1, P56MD0 (bit 6)
P55MD1,P55MD0 (bit 5)
P54MD1, P54MD0 (bit 0)
The P56MD1 and P56MD0 bit is used to select the primary, secondary, or the tertiary function of the P56 pin.
The P55MD1 and P55MD0 bit is used to select the primary, secondary, or the tertiary function of the P55 pin.
The P54MD1 and P54MD0 bit is used to select the primary, secondary, or the tertiary function of the P54 pin.
P56MD1
P54MD1
P55MD1
0
0
1
1
0
0
1
1
0
0
1
1
R/W
R/W
7
0
7
0
P54MD0
P56MD0
P55MD0
0
1
0
1
0
1
0
1
0
1
0
1
P56MD0
P56MD1
R/W
R/W
6
0
6
0
General-purpose input/output mode (initial value)
Melody 0 output
SSIO1 data input
Prohibited
General-purpose input/output mode (initial value)
Prohibited
SSIO1 data output
Prohibited
General-purpose input/output mode (initial value)
Prohibited
SSIO1 synchronous clock input/output
Prohibited
P55MD0
P55MD1
R/W
R/W
5
0
5
0
P54MD0
P54MD1
18-7
R/W
R/W
4
0
4
0
ML610Q407/ML610Q408/ML610Q409 User's Manual
Description
Description
Description
R/W
R/W
3
0
3
0
P52MD0
P52MD1
R/W
R/W
2
0
2
0
P51MD0
P51MD1
R/W
R/W
0
0
1
1
Chapter 18 Port 5
P50MD0
P50MD1
R/W
R/W
0
0
0
0

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