DS26502L+ Maxim Integrated Products, DS26502L+ Datasheet - Page 28
DS26502L+
Manufacturer Part Number
DS26502L+
Description
IC T1/E1/J1 64KCC ELEMENT 64LQFP
Manufacturer
Maxim Integrated Products
Type
BITS Elementr
Datasheet
1.DS26502LN.pdf
(125 pages)
Specifications of DS26502L+
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency-max
-
Output
-
Input
-
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6.5 Transmitter Operating Modes
Table 6-6.Transmit Path Operating Mode
6.6 MCLK Pre-Scaler
Table 6-7. MCLK Pre-Scaler for T1 Mode
Note 1:
Note 2:
TMODE3
PIN 62
PIN 16
MPS1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
The DS26502 does not have an internal source for CAS signaling and multiframe alignment generation. CAS
signaling, and the multiframe alignment word, must be embedded in the transmit data (in the TS16 position) present
on the TSER pin and frame aligned to sync signal on the TS_8K_4 pin.
In addition to setting the TMODE bits to 6312kHz Synchronization Interface mode, the Transmit PLL must also be
configured to transmit a 6312kHz signal through the Transmit PLL Control Register (TPCR.6 and TPCR.7).
TMODE2
PIN 48
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
PIN 15
MPS0
0
1
0
1
0
1
0
1
TMODE1
PIN 49
0
0
1
1
0
0
0
1
1
1
0
0
1
1
0
0
1
1
JACKS0
PIN 46
0
0
0
0
1
1
1
1
TMODE0
PIN 14
0
1
0
1
0
0
1
0
0
1
0
1
0
1
0
1
0
1
MCLK
(MHz)
12.352
16.384
28 of 125
1.544
3.088
6.176
2.048
4.096
8.192
64kHz + 8kHz + 400Hz Synchronization Interface
E1 G.703 2048kHz Synchronization Interface
TRANSMIT PATH OPERATING MODE
6312kHz Synchronization Interface (Note 2)
64kHz + 8kHz Synchronization Interface
E1 CRC4 + CAS (Note 1)
E1 FAS + CAS (Note 1)
E1 CRC4
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
E1 FAS
T1 ESF
J1 ESF
T1 D4
J1 D4
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